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ADP5587ACBZ-R7 Datasheet(PDF) 6 Page - Analog Devices |
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ADP5587ACBZ-R7 Datasheet(HTML) 6 Page - Analog Devices |
6 / 24 page ADP5587 Rev. B | Page 6 of 24 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 2 1 3 4 5 6 18 17 16 15 14 13 R2 R3 R4 R5 R6 R7 C4 NOTES 1. EXPOSED PAD MUST BE CONNECTED TO GROUND. C5 C6 C7 C8 C9 ADP5587 TOP VIEW (Not to Scale) Figure 3. LFCSP Pin Configuration INT RST TOP VIEW (BALL SIDE DOWN) Not to Scale 1 A B C D E 2 3 4 BALL A1 CORNER C6 C1 R2 R7 VCC C7 C2 NC R6 SDA C8 C3 R1 R5 SCL C9 C4 R0 R4 GND C5 C0 R3 NOTES 1. NC = NO CONNECT. 5 Figure 4. WLCSP Pin Configuration Table 8. Pin Function Descriptions LFCSP Pin No. WLCSP Pin No. Mnemonic Description 1 A5 R7 GPIO, Row 7 in the Keypad Matrix. 2 B5 R6 GPIO, Row 6 in the Keypad Matrix. 3 C5 R5 GPIO, Row 5 in the Keypad Matrix. 4 D5 R4 GPIO, Row 4 in the Keypad Matrix. 5 E5 R3 GPIO, Row 3 in the Keypad Matrix. 6 A4 R2 GPIO, Row 2 in the Keypad Matrix. N/A B4 N/A No Connect (NC) 7 C4 R1 GPIO, Row 1 in the Keypad Matrix. 8 D4 R0 GPIO, Row 0 in the Keypad Matrix. 9 E4 C0 GPIO, Column 0 in the Keypad Matrix. 10 A3 C1 GPIO, Column 1 in the Keypad Matrix. 11 B3 C2 GPIO, Column 2 in the Keypad Matrix. 12 C3 C3 GPIO, Column 3 in the Keypad Matrix. 13 D3 C4 GPIO, Column 4 in the Keypad Matrix. 14 E3 C5 GPIO, Column 5 in the Keypad Matrix. 15 A2 C6 GPIO, Column 6 in the Keypad Matrix. 16 B2 C7 GPIO, Column 7 in the Keypad Matrix. 17 C2 C8 GPIO, Column 8 in the Keypad Matrix. 18 D2 C9 GPIO, Column 9 in the Keypad Matrix. 19 E2 GND Ground. 20 A1 RST Hardware Reset (Active Low). This pin resets the device to the power default conditions. The reset pin must be driven low for a minimum of 50 μs to be valid and to prevent false resets due to ESD glitches or noise in the system. If not used, RST must be tied high with a pull-up resistor. 21 B1 VCC Supply Voltage, 1.65 V to 3.6 V. 22 C1 SDA I2C Serial Data. The open drain requires an external pull-up resistor. 23 D1 SCL I2C Clock. 24 E1 INT Processor Interrupt, Active Low, Open Drain. This pin can be pulled up to 2.7 V or 1.8 V for selection flexibility in the processor GPIO supply group. EP N/A EPAD Exposed Pad. The exposed pad must be connected to ground. |
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