Data Sheet

5

Rev. 1.0, 2008-05-29

TLE42754

Pin Configuration

3

Pin Configuration

3.1

Pin Assignment TLE42754D (PG-TO252-5) and TLE42754G (PG-TO263-5)

Figure 2

Pin Configuration (top view)

3.2

Pin Definitions and Functions TLE42754D (PG-TO252-5) and TLE42754G (PG-

TO263-5)

Pin

Symbol

Function

1I

Input

for compensating line influences, a capacitor to GND close to the IC terminals is

recommended

2RO

Reset Output

open collector output; external pull-up resistor to a positive potential required;

leave open if the reset function is not needed

3GND

TLE42754G (PG-TO263-5) only: Ground

internally connected to tab

4D

Reset Delay Timing

connect a ceramic capacitor to GND for adjusting the reset delay time;

leave open if the reset function is not needed

5Q

Output

block to GND with a capacitor close to the IC terminals, respecting the values given

TAB

GND

Ground

connect to heatsink area

AEP02580

15

RO

Ι

DQ

GND

GND

RO

Ι

IEP02528

D

Q

P-TO252-5 (D-PAK)

P-TO263-5 (D²-PAK)