ISL9305H

6

FN7724.0

November 8, 2010

Maximum Output Current

1500

-

-

mA

P-Channel MOSFET ON-resistance

-

0.14

0.20

Ω

-

0.24

0.40

Ω

N-Channel MOSFET ON-resistance

-

0.11

0.20

Ω

0.18

0.34

Ω

P-Channel MOSFET Peak Current Limit

2.1

2.5

2.75

A

SW Maximum Duty Cycle

-

100

-

%

SW Leakage Current

-

0.005

1

µA

PWM Switching Frequency

2.6

3.0

3.4

MHz

SW Minimum ON-time

-

70

-

ns

Bleeding Resistor

-

115

-

Ω

PG

Output Low Voltage

Sinking 1mA, FB1 = FB2 = 0.7V

-

-

0.25

V

Rising Delay Time

Based on 1ms programmed nominal delay time

0.6

1.1

1.8

ms

Falling Delay Time

Based on 1ms programmed nominal delay time

-

30

-

µs

PG Pin Leakage Current

PG = VINDCD1 = VINDCD2 = 3.6V

-

0.005

0.1

µA

PG Low Rising Threshold

Percentage of nominal regulation voltage

-

91

-

%

PG Low Falling Threshold

Percentage of nominal regulation voltage

-

87

-

%

PG High Rising Threshold

Percentage of nominal regulation voltage

-

112

-

%

PG High Falling Threshold

Percentage of nominal regulation voltage

-

109

-

%

LDO1 AND LDO2

VINLDO1, VINLDO2 Supply Voltage

No higher than VINDCD1

1.5

-

5.5

V

VINLDO1, VINLDO2 Undervoltage

Lockout Threshold

Rising

-

1.41

1.46

V

Falling

1.33

1.37

-

V

Internal Peak Current Limit

350

425

540

mA

Dropout Voltage

-

120

250

mV

-

100

200

mV

-

80

170

mV

Power Supply Rejection Ratio

-

55

-

dB

Output Voltage Noise

-

45

-

NOTE:

6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

LDO1 and LDO2, VINLDOx = VOLDOx + 0.5V to 5.5V with VINLDOx always no higher than VINDCD1, L1 = L2 = 1.5µH,

C1 = 10µF, C4 = C5 = 10µF, C2 = C3 = C6 = C7 = 1µF, IOUT = 0A for DCD1, DCD2, LDO1 and LDO2 (see “TYPICAL

APPLICATION DIAGRAM” on page 1 for more details). (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

(Note 6)

TYP

MAX

(Note 6)

UNIT