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TLE7278-2GV33 Datasheet(PDF) 9 Page - Infineon Technologies AG

Part # TLE7278-2GV33
Description  Low Dropout Voltage Regulator
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE7278-2GV33 Datasheet(HTML) 9 Page - Infineon Technologies AG

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Data Sheet
9
Rev. 1.2, 2009-04-28
TLE7278-2
Block Description and Electrical Characteristics
5.1.2
Watchdog Operation
The watchdog uses a fraction of the charge pump oscillator’s clock signal as timebase. The watchdog timebase
can be adjusted using the pins WM1 and WM2 (see Figure 5). The watchdog can be turned off setting WM1 and
WM2 to high level. The timing values used this text refer to typ. values with WM1 and WM2 connected to GND
(fast watchdog and reset timing).
If the timebase is switched by changing the condition on the WM pins, the new timing is valid from the beginning
of the new period on. From this time on, the frequency on the WDI pin must be adapted.
Figure 5 shows the state diagram of the watchdog (WD) and the mode selection. After power-on, the reset output
signal at the RO pin (microcontroller reset) is kept LOW for the reset delay time TRD of typ. 16 ms. With the LOW
to HIGH transition of the signal at RO the device starts the ignore window time
t
CW (32 ms). Next the WD starts
the Watchdog Period (time frame within a trigger at WDI must occur). From now on the timing of the signal on WDI
from the micro controller must correspond the WD-Period
t
WD,p correspondent the electrical characteristics and
based on the setting on the WM pins. A Re-Trigger of the WD-Period is done with a HIGH-to-LOW Transient at
the WDI-pin within the set
t
WD,p.
A HIGH to LOW transition of the watchdog trigger signal on pin WDI is taken as a trigger. To avoid wrong triggering
due to parasitic glitches two HIGH samples followed by two LOW samples (sample period
t
sam typ. 0.5 ms) are
decoded as a valid trigger. A reset is generated (RO goes LOW) if there is no trigger pulse during the Watchdog
Period.
Figure 5
Watchdog Timing Diagram, Watchdog and Reset Modes
t
VI
V
Q
VRO
Trigger
Window
WDI
T
RD
Ingnore
Wnd
VRT
1. Correct Trigger
No Trigger
causing reset
t
rr
t
t
t
t
t
rr
T
RD
Power
Fail
I
Q
t
I
Q, WD_ON
I
Q, WD_OFF
Current Controlled
WD-turn off
No Reset during
Current shut down
Normal operation
Don’t care WDI
during IW
t
sam
t
WD,p
WM1
WM2
Watchdog
Mode
Reset Mode
H
L
Fast
Slow
L
L
Fast
Slow
H
L
Fast
Slow
H
H
Slow
Off
7278 Timing


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