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CC430F513X Datasheet(PDF) 7 Page - Texas Instruments |
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CC430F513X Datasheet(HTML) 7 Page - Texas Instruments |
7 / 120 page RGC PACKAGE (TOP VIEW) CC430F612x 17 64 18 63 19 62 20 61 21 60 22 59 29 52 30 51 31 50 32 49 23 58 24 57 25 56 26 55 27 54 28 53 P4.0/S2 P1.0/PM_RFGDO0/S18 33 16 P5.3/S1 P1.1/PM_RFGDO2/S19 34 15 P5.2/S0 P1.2/PM_UCB0SOMI/PM_UCB0SCL/S20 35 14 RF_XIN P1.3/PM_UCB0SIMO/PM_UCB0SDA/S21 36 13 RF_XOUT P1.4/PM_UCB0CLK/PM_UCA0STE/S22 37 12 AVCC_RF DVCC 38 11 GUARD LCDCAP/R33 45 4 PJ.0/TDO P1.5/PM_UCA0RXD/PM_UCA0SOMI/R23 46 3 PJ.1/TDI/TCLK P1.6/PM_UCA0TXD/PM_UCA0SIMO/R13/LCDREF 47 2 PJ.2/TMS P1.7/PM_UCA0CLK/PM_UCB0STE/R03 48 1 AVCC_RF VCORE 39 10 RF_P P5.4/S23 40 9 RF_N P5.5/COM3/S24 41 8 AVCC_RF P5.6/COM2/S25 42 7 AVCC_RF P5.7/COM1/S26 43 6 R_BIAS COM0 44 5 VSS Exposed die attached pad ECCN 5E002 TSPA - Technology / Software Publicly Available CC430F613x CC430F612x CC430F513x www.ti.com SLAS554E – MAY 2009 – REVISED NOVEMBER 2010 The secondary digital functions on ports P1, P2, and P3 are fully mappable. Pin out above shows only the default mapping. See Table 7 for details. CAUTION: The LCDCAP/R33 must be connected to VSS if not used. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 7 |
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