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W83602G Datasheet(PDF) 10 Page - Winbond |
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W83602G Datasheet(HTML) 10 Page - Winbond |
10 / 21 page W83601R/G/W83602R/G - 10 - CR10 (GP Port1: Interrupt Status Register, Default 0x00, Read Only) Bit 7-0: = 1, a transition occurs at pin GP17-GP10. If GP17/INT is selected as interrupt function, bit 7 of this register will always be 0. A read to this register will clear this register. CR11 (GP Port2: Interrupt Status Register, Default 0x00, Read Only) Bit 7: = Reserved. Bit 6-0: = 1, a transition occurs at pin GP26-GP20. If GP26/INT is selected as interrupt function, bit 6 of this register will always be 0. A read to this register will clear this register. CR12 (GP Port 1: Interrupt Enable Register, Default 0x00, Read / Write) Bit 7-0: = 0, disable GP17-GP10 interrupt output when interrupt function is selected. CR13 (GP Port 2: Interrupt Enable Register, Default 0x00, Read / Write) Bit 7-5: = Reserved. Bit 6-0: = 0, disable GP26-GP20 interrupt output when interrupt function is selected. CR14 Mode Configuration Register (Default 0x00, Read / Write) Bit 7: = 1, Set GP/INT pin as INT function. 0, Set GP/INT pin as GP function. Bit 6: = 1, Set INT function at GP26 (pin 12). 0, Set INT function at GP17 (pin 18). W83602R/G INT function is only at GP17. Bit 5: = 1, Set INT output pin as pulse mode. 0, set INT output pin as level mode. Bit 4: = 1, Set INT output pin polarity is 1 (normal high) . 0, set INT output pin polarity is 0 (normal low). This bit is only for W83601R. Bit 3: = 1, Port 2 (CR09h-CR0Ch, CR11h, CR13h) registers can be reset to default data by RST# pin. 0 Port 2 (CR09h-CR0Ch) can not be reset by RST# pin. Bit 2: = 1, Port 1 (CR01h-CR04h, CR10h, CR12h) registers can be reset to default data by RST# pin. 0, Port 1 (CR01h-CR04h) can not be reset by RST# pin. Bit 1: = 1, Port 2 CR0Dh can be latched not only by RST# pin but also power-on period. 0, Port 2 CR0Dh can only be latched by power-on period. Bit 0: = 1, Port 1 CR05h can be latched not only by RST# pin but also power-on period. 0, Port 1 CR05h can only be latched by power-on period. |
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