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W83195WG-382 Datasheet(PDF) 10 Page - Winbond |
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W83195WG-382 Datasheet(HTML) 10 Page - Winbond |
10 / 27 page W83195WG-382/W83195CG-382 STEPLESS FOR ATI K8 CLOCK GENERATOR Publication Release Date: Feb 2006 - 6 - Revision 0.6 7. I 2C CONTROL AND STATUS REGISTERS (The register No. is increased by 1 if use byte data read/write protocol) 7.1 Register 0: ( Default : 00h ) BIT AFFECTED PIN/ FUNCTION NAME(S) PWD AFFECTED PIN / FUNCTION DESCRIPTION TYPE 7 SSEL<4> 0 6 SSEL<3> 0 5 SSEL<2> 0 4 SSEL<1> 0 3 SSEL<0> 0 Software frequency table selection through I 2C R/W 2 EN_SSEL 0 Enable software table selection FS[4:0]. 0 = Hardware table setting (Jump mode). 1 = Software table setting through Bit7~3 . (Jumpless mode) R/W 1 SPSPEN 0 Enable spread spectrum mode under clock output. 0 = Spread Spectrum mode disable 1 = Spread Spectrum mode enable R/W 0 EN_SAFE_FREQ 0 After watchdog timeout 0 = Reload the hardware FS [4:0] latched pins setting. 1 = Reload the desirable frequency table selection defined at Reg-5 Bit 4~0. R/W 7.2 Register 1: ( Default : XXh) BIT AFFECTED PIN/ FUNCTION NAME(S) PWD FUNCTION DESCRIPTION TYPE 7 Reserved 1 Reserved R/W 6 CPUEN<1> 1 CPUCLKT1/C1 output control 1: Enable 0: Disable R/W 5 CPUEN<0> 1 CPUCLKT0/C0 output control 1: Enable 0: Disable R/W 4 Reserved X Reserved R 3 Reserved X Reserved R 2 FS2_BACK X Power on latched value of FS2 pin. Default : 0 R 1 FS1_BACK X Power on latched value of FS1 pin. Default : 0 R 0 FS0_BACK X Power on latched value of FS0 pin. Default : 0 R |
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