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BCR10PN Datasheet(PDF) 1 Page - Infineon Technologies AG |
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BCR10PN Datasheet(HTML) 1 Page - Infineon Technologies AG |
1 / 7 page 2007-07-24 1 BCR10PN NPN/PNP Silicon Digital Transistor Array • Switching circuit, inverter, interface circuit, driver circuit • Two (galvanic) internal isolated NPN/PNP Transistors in one package • Built in bias resistor NPN and PNP (R1=10 kΩ, R2 =10 kΩ) • Pb-free (RoHS compliant) package1) • Qualified according AEC Q101 1 6 2 3 5 4 EHA07176 6 54 3 2 1 C1 B2 E2 C2 B1 E1 1 R R 2 R1 R 2 TR1 TR2 Tape loading orientation EHA07193 12 3 4 5 6 W1s Direction of Unreeling Top View Marking on SOT-363 package (for example W1s) corresponds to pin 1 of device Position in tape: pin 1 opposite of feed hole side Type Marking Pin Configuration Package BCR10PN W1s 1=E1 2=B1 3=C2 4=E2 5=B2 6=C1 SOT363 Maximum Ratings for NPN and PNP Types Parameter Symbol Value Unit Collector-emitter voltage VCEO 50 V Collector-base voltage VCBO 50 Input forward voltage Vi(fwd) 40 Input reverse voltage Vi(rev) 10 DC collector current IC 100 mA Total power dissipation, TS = 115 °C Ptot 250 mW Junction temperature Tj 150 °C Storage temperature Tstg -65 ... 150 Thermal Resistance Junction - soldering point2) RthJS ≤ 140 K/W 1Pb-containing package may be available upon special request 2For calculation of RthJA please refer to Application Note Thermal Resistance |
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