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L9953 Datasheet(PDF) 7 Page - STMicroelectronics |
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L9953 Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 38 page  L9953 / L9953XP Block diagram and pin description Doc ID 14278 Rev 3 7/38 6, 7, 14, 15, 23, 25, 28, 32 VS Power supply voltage (external reverse protection required) For this input a ceramic capacitor as close as possible to GND is recommended. Important: for the capability of driving the full current at the outputs all pins of VS must be externally connected. 8DI Serial data input The input requires CMOS logic levels and receives serial data from the microcontroller. The data is an 24bit control word and the least significant bit (LSB, bit 0) is transferred first. 9 CM/PWM2 Current monitor output/PWM2 input Depending on the selected multiplexer bits of Input Data Register this output sources an image of the instant current through the corresponding highside driver with a ratio of 1/10.000. This pin is bidirectional. The microcontroller can overdrive the current monitor signal to provide a second PWM input for the output OUT7. 10 CSN Chip select not input / test mode This input is low active and requires CMOS logic levels. The serial data transfer between L9953 and micro controller is enabled by pulling the input CSN to low level. If an input voltage of more than 7.5V is applied to CSN pin the L9953 will be switched into a test mode. 11 DO Serial data output The diagnosis data is available via the SPI and this tristate-output. The output will remain in tristate, if the chip is not selected by the input CSN (CSN = high) 12 VCC Logic supply voltage For this input a ceramic capacitor as close as possible to GND is recommended. 13 CLK Serial clock input This input controls the internal shift register of the SPI and requires CMOS logic levels. 16,17, 20,21, OUT4 OUT5 Half-bridge-output 4,5: see OUT1 (pin 3). Important: for the capability of driving the full current at the outputs both pins of OUT4 (OUT5, respectively) must be externally connected. 26 CP Charge pump output This output is provided to drive the gate of an external n-channel power MOS used for reverse polarity protection 27 PWM1 PWM1 input: This input signal can be used to control the drivers OUT1-OUT6 and OUT8 by an external PWM signal. Table 2. Pin definitions and functions (continued) Pin Symbol Function |
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