Voltage-Tracking Controllers for

PowerPC, DSPs, and ASICs

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7

Performance During

Typical Operation

Scope shots are of the MAX5040 EV kit. Figures 1

through 8 demonstrate system performance of the

MAX5040 under various power-up, power-down, and

fault conditions. In some cases (described in detail

below), startup or shutdown of the I/O and CORE sup-

plies were purposely delayed with respect to each

other to simulate possible system operating conditions.

the I/O supply comes up before the CORE supply. As

supplies. Although the CORE PWM supply turns on 5ms

after the I/O PWM supply, both supply voltages come up

plies together through the N-channel FET. The I/O supply

supports both the I/O line and the CORE line. Once

the CORE supply comes up, NDRV goes to GND, and

falls, turning the I/O and CORE supplies off. Simultane-

ously, POK falls, indicating power-down to the proces-

sor. When the I/O voltage drops below the CORE

falls below 2.5V and then it returns to GND.

and the CORE and I/O supplies are turned on when

the CORE voltage. There is a 3.3V difference between

the I/O and CORE supplies for about 4ms before the

down, I/O remains high for about 10ms after CORE

reaches GND.

the CORE supply comes up before the I/O supply. As

supplies. Although the I/O PWM supply turns on 8ms

after the CORE PWM supply, both supply voltages come

supplies together through the N-channel FET. The CORE

supply supports both the CORE line and the I/O line until

the I/O supply comes up. At around 23ms, the I/O supply

turns on, pulling the I/O voltage above the CORE volt-

age. At this point, the MAX5040 brings NDRV to GND

ately falls, turning the I/O and CORE supplies off.

Simultaneously POK falls, indicating power-down to the

processor. When the CORE voltage drops below its reg-

ulation point, NDRV begins to regulate it (at around

30ms). When I/O falls below CORE, NDRV is pulled up to

and the CORE voltage comes up before the I/O volt-

age. It takes about 8ms before the I/O supply finally

down, the supplies do not turn off together. CORE

remains high for around 14ms after I/O falls.

In Figure 5 (with MAX5040), the system power-up is

attempted with the CORE supply held in shutdown. As

shorting the I/O and CORE supplies together. Next,

supplies. Both supplies come up together because

NDRV is high. Note that the CORE supply is still off;

CORE is held up through the N-channel FET shunt.

around 2.8V. After 15ms of regulating CORE, the

MAX5040 latches a fault. SDO goes low, NDRV goes to

remains low throughout because a valid operating state

was not achieved.

UVLO from low to high controls system startup. While

the supplies to be shorted together. When UVLO goes

high, SDO also goes high, turning on the CORE and I/O

supplies (at around 3ms). In this example, the I/O sup-

ply comes up before the CORE supply. The MAX5040

regulates CORE by driving NDRV to about 2.8V until the

CORE supply comes up (at around 7ms), then NDRV

falls to GND and POK goes high. When UVLO is driven

low, SDO goes low, disabling the CORE and I/O sup-

down together.

UVLO from low to high controls system startup. While

the supplies together while they are both off. When

UVLO does go high, SDO also goes high, turning on

the CORE and I/O supplies (at around 8ms). In this

example, the CORE supply comes up before the I/O