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CY7C64356-48LTXI Datasheet(PDF) 7 Page - Cypress Semiconductor |
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CY7C64356-48LTXI Datasheet(HTML) 7 Page - Cypress Semiconductor |
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7 / 32 page  CY7C6431x CY7C6434x, CY7C6435x Document Number: 001-12394 Rev *I Page 7 of 32 Designing with PSoC Designer The development process for the enCoRe V device differs from that of a traditional fixed function microprocessor. Powerful PSoC Designer tools get the core of your design up and running in minutes instead of hours. The development process can be summarized in the following four steps: 1. Select Components 2. Configure Components 3. Organize and Connect 4. Generate, Verify, and Debug Select Components The chip-level view provides a library of pre-built, pre-tested hardware peripheral components. These components are called “user modules.” User modules make selecting and implementing peripheral devices simple, and come in analog, digital, and mixed-signal varieties. Configure Components Each of the components you select establishes the basic register settings that implement the selected function. They also provide parameters and properties that allow you to tailor their precise configuration to your particular application. The chip-level user modules are documented in data sheets that are viewed directly in PSoC Designer. These data sheets explain the internal operation of the component and provide perfor- mance specifications. Each data sheet describes the use of each user module parameter and contains other information you may need to successfully implement your design. Organize and Connect You build signal chains at the chip level by interconnecting user modules to each other and the I/O pins, or connect system-level inputs, outputs, and communication interfaces to each other with valuator functions. In the chip-level view, you perform the selection, configuration, and routing so that you have complete control over the use of all on-chip resources. Generate, Verify, and Debug When you are ready to test the hardware configuration or move on to developing code for the project, you perform the “Generate Configuration Files” step. This causes PSoC Designer to generate source code that automatically configures the device to your specification and provides the software for the system. Both system-level and chip-level designs generate software based on your design. The chip-level design provides application programming interfaces (APIs) with high level functions to control and respond to hardware events at run time and interrupt service routines that you can adapt as needed. The system-level design also generates a C main() program that completely controls the chosen application and contains placeholders for custom code at strategic positions allowing you to further refine the software without disrupting the generated code. A complete code development environment allows you to develop and customize your applications in C, assembly language, or both. The last step in the development process takes place inside PSoC Designer’s Debugger (access by clicking the Connect icon). PSoC Designer downloads the HEX image to the In-Circuit Emulator (ICE) where it runs at full speed. PSoC Designer debugging capabilities rival those of systems costing many times more. In addition to traditional single-step, run-to-breakpoint and watch-variable features, the debug interface provides a large trace buffer and allows you to define complex breakpoint events that include monitoring address and data bus values, memory locations and external signals. [+] Feedback |
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