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CY8C20180 Datasheet(PDF) 6 Page - Cypress Semiconductor |
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CY8C20180 Datasheet(HTML) 6 Page - Cypress Semiconductor |
6 / 29 page CY8C20110/CY8C20180/CY8C20160 CY8C20140/CY8C20142 Document Number: 001-54606 Rev. ** Page 6 of 29 Circuit 3 - Compatibility with 1.8V I2C Signaling Note 1.8V ≤ VDD_I2C ≤ VDD_CE and 2.4V ≤ VDD_CE ≤ 5.25V Circuit 4 - Powering Down CapSense Express Device for Low Power Requirements For low power requirements, if Vdd is to be turned off, this concept can be used. The requirement is that the Vdds of CapSense Express, I2C pull ups, and LEDs should be from the same source such that turning off the Vdd ensures that no signal is applied to the device while it is unpowered. The I2C signals should not be driven high by the master in this situation. If a port pin or group of port pins of the master can cater to the power supply requirements of the circuit, the LDO can be avoided. Master Or Host LDO CapSense Express I2C Pull UPs LED I2C BUS SDA SCL VDD Output Output enable [+] Feedback [+] Feedback |
Similar Part No. - CY8C20180 |
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Similar Description - CY8C20180 |
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