NHD-0224AZ-FL-YBW

Newhaven Display

10

NOTE:

When an MPU program with checking the busy flag (DB7) is made, it must be necessary 1/2fosc is

necessary for executing the next instruction by the falling edge of the “E” signal after the busy flag (DB7) goes

to “Low”.

11.3Contents

1) Clear display

RS

R/W

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

0

0

0

0

0

0

0

0

0

1

Clear all the display data by writing “20H” (space code) to all DDRAM address, and set DDRAM address

to “00H” into AC (address counter).

Return cursor to the original status, namely, bring the cursor to the left edge on the fist line of the display.

Make the entry mode increment (I/D=“High”).

2) Return home

RS

R/W

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

0

0

0

0

0

0

0

0

1

-

Return home is cursor return home instruction.

Set DDRAM address to “00H” into the address counter.

Return cursor to its original site and return display to its original status, if shifted.

Contents of DDRAM does not change.

3) Entry mode set

RS

R/W

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

0

0

0

0

0

0

0

1

I/D

SH

Set the moving direction of cursor and display.

I/D: increment / decrement of DDRAM address (cursor or blink)

When I/D=“high”, cursor/blink moves to right and DDRAM address is increased by 1.

When I/D=“Low”, cursor/blink moves to left and DDRAM address is increased by 1.

*CGRAM operates the same way as DDRAM, when reading from or writing to CGRAM.

SH: shift of entire display

When DDRAM read (CGRAM read/write) operation or SH=“Low”, shifting of entire display is not performed. If

SH =“High” and DDRAM write operation, shift of entire display is performed according to I/D value. (I/D=“high”.

shift left, I/D=“Low”. Shift right).

4) Display ON/OFF control

RS

R/W

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

0

0

0

0

0

0

1

D

C

B

Control display/cursor/blink ON/OFF 1 bit register.

D: Display ON/OFF control bit

When D=“High”, entire display is turned on.

When D=“Low”, display is turned off, but display data remains in DDRAM.

C: cursor ON/OFF control bit

When D=“High”, cursor is turned on.

When D=“Low”, cursor is disappeared in current display, but I/D register preserves its data.

B: Cursor blink ON/OFF control bit

When B=“High”, cursor blink is on, which performs alternately between all the “High” data and display

characters at the cursor position.

When B=“Low”, blink is off.

5) Cursor or display shift

RS

R/W

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0