 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PIC24FJ128GA Datasheet(PDF) 10 Page - Microchip Technology |
|
||||||||||||||||||||||||||||||
PIC24FJ128GA Datasheet(HTML) 10 Page - Microchip Technology |
|
|
10 / 22 page  PIC24FJ256GA110 FAMILY DS80368N-page 10 2008-2013 Microchip Technology Inc. 27. Module: Interrupts (INTx) Writing to the INTCON2 register may cause an external interrupt event (inputs on INT0 through INT4) to be missed. This only happens when the interrupt event and the write event occur during the same clock cycle. Work around If possible, do not write to INTCON2 while any of the external interrupts are enabled. If this cannot be avoided, write the data intended for INTCON2 to any other register in the inter- rupt block of the SFR (addresses, 0080h to 00E0h); then write the data to INTCON2. Be certain to write the data to a register not being actively used by the application, or to any of the interrupt flag registers, in order to avoid spurious interrupts. For example, if the inter- rupts controlled by IEC5 are not being used in the application, the code sequence would be: IEC5 = 0x1E; INTCON2 = 0x1E; IEC5 = 0; It is the user’s responsibility to determine an appropriate register for the particular application. Affected Silicon Revisions 28. Module: A/D Converter Once the A/D module is enabled (AD1CON1<15> = 1), it may continue to draw extra current even if the module is later disabled (AD1CON1<15> = 0). Work around In addition to disabling the module through the ADON bit, set the corresponding PMD bit (ADC1MD, PMD1<0>) to power it down completely. Disabling the A/D module through the PMD regis- ter also disables the AD1PCFG registers, which in turn, affects the state of any port pins with analog inputs. Users should consider the effect on I/O ports and other digital peripherals on those ports when ADC1MD is used for power conservation. Affected Silicon Revisions 29. Module: CTMU Using the CTMUMD bit (PMD4<2>) to selec- tively power down the module may reduce the accuracy of the internal band gap reference (VBG). In those cases where VBG is used as a reference for other analog modules, the accuracy of measurements or comparisons may be affected. Work around If the A/D Converter or comparators are being used with VBG selected as a reference, do not set the CTMUMD bit. Affected Silicon Revisions 30. Module: Oscillator The POSCEN bit (OSCCON<2>) has no effect when a Primary Oscillator with PLL mode is selected (COSC<2:0> = 011). If XTPLL, HSPLL or ECPLL Oscillator mode are selected, and the device enters Sleep mode, the Primary Oscilla- tor will be disabled, regardless of the state of the POSCEN bit. XT, HS and EC Oscillator modes (without the PLL) will continue to operate as expected. Work around None. Affected Silicon Revisions A3 A5 A6 XX X A3 A5 A6 XX X A3 A5 A6 XX X A3 A5 A6 XX X |
Similar Part No. - PIC24FJ128GA |
|
Similar Description - PIC24FJ128GA |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
