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XX82567LM Datasheet(PDF) 7 Page - Intel Corporation |
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XX82567LM Datasheet(HTML) 7 Page - Intel Corporation |
7 / 33 page 7 Datasheet—82567 2.0 Signal Descriptions 2.1 Signal Type Definitions The signals are defined as follows in the table below: 2.2 GLCI Interface Pins Type Description In (I) Standard input-only signal. Out (O) Totem pole output is a standard active driver. T/s Tri-state is a bi-directional, tri-state input/output pin. S/st/s Sustained tri-state is an active low tri-state signal owned and driven by one and only one agent at a time. The agent that drives an s/t/s pin low must drive it high for at least one clock before letting it float. A new agent cannot start driving an s/t/s signal any sooner than one clock after the previous owner tri-states it. O/d Open drain enables multiple devices to share as a wire-OR. A-in Analog input signal. A-out Analog output signal. B Input bias. PPower PU Pull-up. PD Pull-down. Signal Name Pin Type Description GLAN_RXP GLAN_RXN 55 56 A-in GLCI Serial Data Input This is the differential input for GLCI (MAC to PHY). GLAN_TXN GLAN_TXP 53 52 A-out GLCI Serial Data Output This is the differential output for GLCI (PHY to MAC). XTAL2 XTAL1 9 10 A-out A-in Crystal Oscillator An external 25 MHz crystal can be connected to these pins to generate a 25 MHz reference clock. A 25 MHz reference clock can also be generated from an external 1.4 V oscillator connected to the XTAL1 input pin. |
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