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321792-001 Datasheet(PDF) 4 Page - Intel Corporation |
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321792-001 Datasheet(HTML) 4 Page - Intel Corporation |
4 / 33 page 82567—Datasheet iv Revision History Note: The revision numbering system changed with the first November 2007 release. At that time, the collateral for this device began synchronizing with platform collateral revision numbering. There were no releases between versions 0.76 and 1.5. Date Revision Description Oct 2006 0.1 Initial release (Intel secret) January 2007 0.25 Corrected pin numbers and made minor text corrections (Intel Confidential) February 2007 0.26 Corrected GLAN TX pin numbers; added RSET & DIS_REG1_0 to the signal descriptions; corrected LAN_DISABLE# (active high) to LAN_DISABLE_N (active low); in the Visual Pin Assignment Diagram, pin 37, “LAN Enable” was corrected to “LAN_Disable_N”; removed VHV references. April 2007 0.50 Minor text updates. May 2007 0.51 Updated power consumption target values. August 2007 0.75 Added Low-Power feature information, Recommended Operating Conditions, DC and AC Characteristics, Preliminary LED/TEST/JTAG I/F DC Specifications, Crystal Specification, Voltage RegulatorPower Supply Specification, PnP Transistor Specification, and Power Sequencing information. September 2007 0.76 Changed IEEE 802.3ab designation to conformance November 2007 1.5 Updated features list; updated Reference Documents; added SKU information; Updated power rail information (1.8 V-1.9 V, 1.05 V); clarified oscillator placement information; updated power target information; corrected Slope and Operation Range characteristics for 1.8-1.9 V rail; added pointer to reference schematics for regulator information. November 2007 1.51 Deleted “programmable” from 1.8 V-1.9 V power rail listing in the Features list. December 2007 1.6 Corrected 1.05 V power rail tolerance to +7% / -5% (1.0 V min, 1.12 V max) February 2008 1.7 Added XOR test file information; updated SKU and Features table; added information regarding using LAN_PHY_PWR_CTRL ; updated Recommended Operating Conditions; updated DC and AC characteristics; updated crystal/oscillator specifications; updated the measured power consumption values; updated reference schematic link information; updated the 1.8 V-1.9 V rail operational range value; updated the 1.05 V rail operational range value; corrected Ptot Min value in PNP specification; March 2008 2.0 Updated Reference Documents list; updated Testability Pins table; updated SKU table; updated Power Consumption tables 7-10; updated power delivery drawing; added Ambient Operating Temperature table. March 2008 2.1 Updated SKU table; Combined Tables 5 and 6 to create new Table 5. April 2008 2.2 Updated Table 2.4 (added pull-up type designation to LAN_DISABLE_N); updated Table 12 (added LAN_DISABLE_N information) July 2008 2.3 Updated WoL information; added System Idle Power Saver information; updated crystal tolerances; updated LED pin table; updated pinout illustration; updated package tolerance values. April 2009 2.4 Updated SKU table; added SPI FLASH Programming Guide and 82567 Specification Update to Reference Documents; added note regarding ACBS operation; added WoL power information; added Solution Power information to Power Consumption table; clarified crystal Drive Level specification. |
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