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TDA8263HN Datasheet(PDF) 9 Page - NXP Semiconductors |
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TDA8263HN Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 28 page 9397 750 13193 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 14 December 2004 9 of 28 Philips Semiconductors TDA8263HN Fully integrated satellite tuner 11.6 I2C-bus table in write mode (default at POR) [1] X means don’t care. 11.7 Bit description I2C-bus write mode Table 8: I2C-bus write mode map (default at POR) [1] Subaddress (hex) MSB LSB 7 6 5 4 3 2 1 0 0X - - -0 1- -1 1X 00100000 2X 00000001 3X 00000001 4X 00000 - - - 5X 0000 - - - 0 6X 0 0 X X 0 X 0 - 7X 100 - - - 00 8X 0- -0 0 0 0- 9X 0000 - - - - Table 9: Power-down section; bits PDXTOUT, PDRSSI and TEST1 Bit Description State PDXTOUT power-down of the XTOUT output 0 = function on; 1 = function off PDRSSI power-down of the input level detector 0 = function on; 1 = function off TEST1 used for test purposes only must be logic 1 Table 10: Reference divider range; bits R[2:0] These bits select the ratio between the comparison frequency and the crystal frequency. R2 R1 R0 Decimal Comparison frequency 0 0 0 0 2 MHz 0 0 1 1 1 MHz 0 1 0 2 500 kHz 0 1 1 3 250 kHz 1 0 0 4 125 kHz 1 0 1 5 125 kHz 1 1 0 6 125 kHz 1 1 1 7 125 kHz Table 11: VCO preprogramming range; bits D[4:0] These bits are also called Dword: It determines the ratio between LO frequency and VCO frequency. The bits are used for the calibration protocol of the internal VCO. D4 D3 D2 D1 D0 Decimal Ratio fLO to fVCO 00000 0 0.27 00001 1 0.29 00010 2 0.31 00011 3 0.33 |
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