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SN74LVC1G0832YZPR Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LVC1G0832YZPR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 17 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) 1 3 4 A B Y 6 C SN74LVC1G0832 SINGLE 3-INPUT POSITIVE AND-OR GATE SCES606C – SEPTEMBER 2004 – REVISED JANUARY 2007 By tying one input to GND or VCC, the SN74LVC1G0832 offers two more functions. When C is tied to GND, this device performs as a 2–input AND gate (Y = A • B). When A is tied to VCC, the device works as a 2–input OR gate (Y = B + C). This device also works as a 2–input OR gate when B is tied to VCC (Y = A + C). NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE(1) INPUTS OUTPUT Y A B C X X H H H H X H X L L L L X L L (1) X = Valid H or L LOGIC DIAGRAM (POSITIVE LOGIC) FUNCTION SELECTION TABLE LOGIC FIGURE FUNCTION 2-Input AND Gate Figure 1 2-Input OR Gate Figure 2 Y = (A • B) + C Figure 3 2 Submit Documentation Feedback |
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