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FIFO

A 32-byte first-in first-out (FIFO) memory buffer, integrated with the TNT ASIC,

buffers data sent to or received from the GPIB. By buffering the data, you

increase the data transfer rate because the I/O bus and the GPIB can overlap

their respective accesses to the FIFO, rather than one bus waiting for the other

to complete a cycle.

IEEE 488 Interface Functions

The NI PCI-GPIB+, PCIe-GPIB+, and PCIe-GPIB+/LP boards contain program

registers that configure, control, and monitor all IEEE 488 interface functions.

These functions are fully compatible with ANSI/IEEE Standard 488.2-1987.

GPIB Transceivers

Transceivers interface the NI PCI-GPIB+, PCIe-GPIB+, and PCIe-GPIB+/LP

to the IEEE 488 bus. The transceivers, which are part of the TNT ASIC, provide

power-up/power-down bus protection (glitch free).

Ordering Information

NI PCI-GPIB+, NI-488.2, and GPIB analyzer software for

Windows Vista/XP/2000.......................................................778033-01

Windows Vista/XP/2000 (2 m cable)....................................778033-51

NI PCIe-GPIB+, NI-488.2, and GPIB analyzer software for

Windows Vista/XP/2000.......................................................780935-01

Windows Vista/XP/2000 (2 m cable)....................................780935-57

NI PCIe-GPIB+/LP, NI-488.2, and GPIB analyzer software for

Windows Vista/XP/2000.......................................................780936-01

BUY NOW

For complete product specifications, pricing, and accessory information,

call 800 813 3693 (U.S.) or go to ni.com/gpib.

GPIB Analyzers for PCI and PCI Express