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MB90F947APF Datasheet(PDF) 3 Page - Fujitsu Component Limited. |
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MB90F947APF Datasheet(HTML) 3 Page - Fujitsu Component Limited. |
3 / 72 page MB90945 Series DS07-13741-3E 3 ■ PRODUCT LINEUP (Continued) Part Number Parameter MB90947A MB90F946A MB90F947A, MB90F949A MB90V390HB CPU F2MC-16LX CPU System clock On-chip PLL clock multiplier ( ×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops) Minimum instruction execution time : 42 ns (4 MHz oscillation clock, PLL clock multiplied by 6) ROM ROM memory 128 Kbytes Boot-block Flash memory 384 Kbytes Boot-block Flash memory 256 Kbytes: MB90F949A 128 Kbytes: MB90F947A External RAM 6 Kbytes 16 Kbytes 12 Kbytes: MB90F949A 6 Kbytes: MB90F947A 30 Kbytes Emulator-specific power supply*1 ⎯ Yes Technology 0.35 µm CMOS with on-chip voltage regulator for internal power supply 0.35 µm CMOS with on-chip voltage regulator for internal power supply + Flash memory with on-chip charge pump for programming voltage 0.35 µm CMOS with on-chip voltage regulator for internal power supply Operating voltage range 3.5 V to 5.5 V : other than conditions listed below 4.0 V to 5.5 V : when writing to Flash 4.5 V to 5.5 V : if A/D Converter is used 5 V ± 10% Temperature range −40 °C to +105 °C ⎯ Package QFP-100P PGA-299C UART 1 channel 2 channels Full duplex double buffer Supports asynchronous/synchronous (with start/stop bit) transfer Baud rate : 4808/9615/10417/19230/38460/62500/500000 bps (asynchronous) 500 K/1 M/2 Mbps (synchronous) at System clock = 20 MHz UART (LIN/SCI/SPI) 1 channel 2 channels 1 channel 2 channels Serial I/O 1 channel Transfer can be started from MSB or LSB Supports internal clock synchronized transfer and external clock synchronized transfer Supports positive-edge and negative-edge clock synchronization Baud rate : 31.25 K/62.5 K/125 K/500 K/1 Mbps at System clock = 20 MHz I2C (400 Kbps) 1 channel |
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