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MB90F897YPMT Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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MB90F897YPMT Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
2 / 52 page MB90895 Series 2 DS07-13731-5E (Continued) • Instruction system best suited to controller • Wide choice of data types (bit, byte, word, and long word) • Wide choice of addressing modes (23 types) • Enhanced multiply-divide instructions and RETI instructions • Enhanced high-precision computing with 32-bit accumulator • Instruction system compatible with high-level language (C language) and multitask • Employing system stack pointer • Enhanced various pointer indirect instructions • Barrel shift instructions • Increased processing speed • 4-byte instruction queue • Powerful interrupt function with 8 levels and 34 factors • Automatic data transfer function independent of CPU • Extended intelligent I/O service function (EI2OS): Maximum of 16 channels • Low power consumption (standby) mode • Sleep mode (a mode that halts CPU operating clock) • Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and watch timer only) • Watch mode (a mode that operates sub clock and watch timer only) • Stop mode (a mode that stops oscillation clock and sub clock) • CPU intermittent operation mode • Process •CMOS technology • I/O port • General-purpose input/output port (CMOS output) : MB90F897/Y : 34 ports (including 4 high-current output ports) MB90F897S/YS : 36 ports (including 4 high-current output ports) • Timer • Time-base timer, watch timer, watchdog timer: 1 channel • 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels • 16-bit reload timer: 2 channels • 16-bit input/output timer - 16-bit free run timer: 1 channel - 16-bit input capture: (ICU): 4 channels Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin input. • CAN controller: 1 channel • Complied with Ver 2.0A and Ver 2.0B CAN specifications • 8 built-in message buffers • Transmission rate of 10 kbps to 1 Mbps (by 16 MHz machine clock) •CAN wake-up • UART0 (SCI), UART1(SCI): 2 channels • Equipped with full-duplex double buffer • Clock-asynchronous or clock-synchronous serial transmission is available. • DTP/External interrupt: 4 channels, CAN wake-up: 1channel • Module for activation of extended intelligent I/O service (EI2OS), and generation of external interrupt. • Delay interrupt generator module • Generates interrupt request for task switching. • 8/10-bit A/D converter: 8 channels • Resolution is selectable between 8-bit and 10-bit. • Activation by external trigger input is allowed. • Conversion time: 6.125 μs (at 16-MHz machine clock, including sampling time) • Program patch function • Address matching detection for 2 address pointers. |
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