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MB90F574A Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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MB90F574A Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
2 / 120 page MB90570A/570C Series 2 DS07-13701-9E ■ FEATURES • Clock Embedded PLL clock multiplication circuit Operating clock (PLL clock) can be selected from 1/2 to 4 × oscillation (at oscillation of 4 MHz, 4 MHz to 16 MHz). Minimum instruction execution time: 62.5 ns (at oscillation of 4 MHz, 4 × PLL clock, operation at VCC of 5.0 V) • Maximum memory space 16 Mbytes • Instruction set optimized for controller applications Rich data types (bit, byte, word, long word) Rich addressing mode (23 types) Enhanced signed multiplication/division instruction and RETI instruction functions Enhanced precision calculation realized by the 32-bit accumulator • Instruction set designed for high level language (C) and multi-task operations Adoption of system stack pointer Enhanced pointer indirect instructions Barrel shift instructions • Program patch function (for two address pointers) • Enhanced execution speed 4-byte instruction queue • Enhanced interrupt function 8 levels, 34 factors • Automatic data transmission function independent of CPU operation Extended intelligent I/O service function (EI2OS): Up to 16 channels • Embedded ROM size and types Mask ROM: 128 kbytes/256 kbytes Flash ROM: 256 kbytes Embedded RAM size:6 kbytes/10 kbytes (mask ROM) 10 kbytes (flash memory) 10 kbytes (evaluation device) • Low-power consumption (standby) mode Sleep mode (mode in which CPU operating clock is stopped) Stop mode (mode in which oscillation is stopped) CPU intermittent operation mode Hardware standby mode • Process CMOS technology • I/O port General-purpose I/O ports (CMOS): 63 ports General-purpose I/O ports (with pull-up resistors): 24 ports General-purpose I/O ports (open-drain): 10 ports Total: 97 ports •Timer Timebase timer/watchdog timer: 1 channel 8/16-bit PPG timer: 8-bit × 2 channels or 16-bit × 1 channel • 8/16-bit up/down counter/timer: 1 channel (8-bit × 2 channels) (Continued) |
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