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MB90F482B Datasheet(PDF) 8 Page - Fujitsu Component Limited. |
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MB90F482B Datasheet(HTML) 8 Page - Fujitsu Component Limited. |
8 / 124 page MB90480B/485B Series 8 DS07-13722-11E ■ PIN DESCRIPTIONS Pin No. Pin name I/O circuit type*3 Function QFP*1 LQFP*2 82 80 X0 A Clock (oscillator) input pin 83 81 X1 A Clock (oscillator) output pin 80 78 X0A A Clock (32 kHz oscillator) input pin 79 77 X1A A Clock (32 kHz oscillator) output pin 77 75 RST B Reset input pin 85 to 92 83 to 90 P00 to P07 C (CMOS) This is a general purpose I/O port. A setting in the port 0 input resistance register (RDR0) can be used to apply pull-up resistance (RD00-RD07 = “1”) . (Disabled when pin is set for output.) AD00 to AD07 In multiplex mode, these pins function as the external address/data bus low I/O pins. D00 to D07 In non-multiplex mode, these pins function as the external data bus low output pins. 93 to 100 91 to 98 P10 to P17 C (CMOS) This is a general purpose I/O port. A setting in the port 1 input resistance register (RDR1) can be used to apply pull-up resistance (RD10-RD17 = “1”) . (Disabled when pin is set for output.) AD08 to AD15 In multiplex mode, these pins function as the external address/data bus high I/O pins. D08 to D15 In non-multiplex mode, these pins function as the external data bus high output pins. 1 to 4 99,100, 1, 2 P20 to P23 E (CMOS/H) This is a general purpose I/O port. When the bits of external address output control register (HACR) are set to "1" in external bus mode, these pins function as general purpose I/O ports. A16 to A19 When the bits of external address output control register (HACR) are set to "0" in multiplex mode, these pins function as address high output pins (A16 to A19). When the bits of external address output control register (HACR) are set to "0" in non-multiplex mode, these pins function as address high output pins (A16 to A19). 5 to 8 3 to 6 P24 to P27 E (CMOS/H) This is a general purpose I/O port. When the bits of external address output control register (HACR) are set to "1" in external bus mode, these pins function as general purpose I/O ports. A20 to A23 When the bits of external address output control register (HACR) are set to "0" in multiplex mode, these pins function as address high output pins (A20 to A23). When the bits of external address output control register (HACR) are set to "0" in non-multiplex mode, these pins function as address high output pins (A20 to A23). PPG0 to PPG3 Output pins for PPG. 97 P30 E (CMOS/H) This is a general purpose I/O port. A00 In non-multiplex mode, this pin functions as an external address pin. AIN0 8/16-bit up/down timer input pin (ch.0) . |
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