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MB90F455PMT Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB90F455PMT Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
4 / 80 page MB90455 Series 4 DS07-13728-4E ■ PRODUCT LINEUP (Continued) Part Number MB90F455 (S) / F456 (S) /F457 (S) MB90455 (S) / 456 (S) /457 (S) MB90V495G Parameter Classification Flash ROM Mask ROM Evaluation product ROM capacity MB90F455 (S) : 24 Kbytes MB90F456 (S) : 32 Kbytes MB90F457 (S) : 64 Kbytes MB90455 (S) : 24 Kbytes MB90456 (S) : 32 Kbytes MB90457 (S) : 64 Kbytes ⎯ RAM capacity 2 Kbytes 6 Kbytes Clock MB90F455/F456/F457 : 2 systems MB90F455S/F456S/F457S : 1 system MB90455/456/457 : 2 systems MB90455S/456S/457S : 1 system 2 systems Process CMOS Package LQFP-48 (Pin pitch 0.50 mm) PGA256 Operating power supply voltage 3.5 V to 5.5 V 4.5 V to 5.5 V Special power supply for emulator*1 ⎯ None CPU functions Number of basic instructions Instruction bit length Instruction length Data bit length : 351 instructions : 8 bits and 16 bits : 1 byte to 7 bytes : 1 bit, 8 bits, 16 bits Minimum instruction execution time : 62.5 ns (at 16-MHz machine clock) Interrupt processing time : 1.5 µs at minimum (at 16-MHz machine clock) Low power consumption (standby) mode Sleep mode/Watch mode/Time-base timer mode/ Stop mode/CPU intermittent I/O port General-purpose input/output ports (CMOS output) : 34 ports (36 ports*2) including 4 high-current output ports (P14 to P17) Time-base timer 18-bit free-run counter Interrupt cycle : 1.024 ms, 4.096 ms, 16.834 ms, 131.072 ms (with oscillation clock frequency at 4 MHz) Watchdog timer Reset generation cycle: 3.58 ms, 14.33 ms, 57.23 ms, 458.75 ms (with oscillation clock frequency at 4 MHz) 16-bit input/ output timer 16-bit free-run timer Number of channels: 1 Interrupt upon occurrence of overflow Input capture Number of channels: 4 Retaining free-run timer value set by pin input (rising edge, falling edge, and both edges) 16-bit reload timer Number of channels: 2 16-bit reload timer operation Count clock cycle: 0.25 µs, 0.5 µs, 2.0 µs (at 16-MHz machine clock frequency) External event count is allowed. Watch timer 15-bit free-run counter Interrupt cycle: 31.25 ms, 62.5 ms, 12 ms, 250 ms, 500 ms, 1.0 s, 2.0 s (with 8.192 kHz sub clock) |
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