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ISL78210ARUZ-T Datasheet(PDF) 7 Page - Intersil Corporation |
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ISL78210ARUZ-T Datasheet(HTML) 7 Page - Intersil Corporation |
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7 / 17 page  ISL78210 7 FN7583.0 March 8, 2010 Setpoint Reference Voltage The 500mV output of the setpoint reference voltage (VSREF) appears at the SREF pin. This signal is the output of the current limited voltage follower that buffers an internal 500mV voltage reference (VREF.) The converter is in regulation when the voltage at the FB pin (VFB) equals the VSREF voltage at the SREF pin. Both of these pins are measured relative to the GND pin, not the PGND pin. The feedback voltage-divider network consisting of offset resistor (ROFS) and loop-compensation resistor (RFB) scale down the converter output voltage (VOUT) such that the voltage VFB equals VSREF when VOUT equals the desired output voltage of the converter. The voltage-divider relation is given in Equation 1: Where: -VFB = VSREF -RFB is the loop-compensation feedback resistor that connects from the FB pin to the converter output -ROFS is the voltage-scaling programming resistor that connects from the FB pin to the GND pin The value of offset resistor ROFS must be recalculated whenever the value of loop-compensation resistor RFB has been changed. Calculation of ROFS is written as shown in Equation 2: Soft-Start Delay Circuit Description When the voltage on the VCC pin has ramped above the rising power-on reset voltage VVCC_THR, and the voltage on the EN pin has increased above the rising enable threshold voltage VENTHR, the SREF pin releases its discharge clamp, and enables the reference amplifier VSET. The soft-start current ISS is limited to 20µA and is sourced out of the SREF pin and charges capacitor CSOFT until VSREF equals VREF. The regulator controls the PWM such that the voltage on the FB pin tracks the rising voltage on the SREF pin. The elapsed time from when the EN pin is asserted to when VSREF has charged CSOFT to VREF is called the soft-start delay tSS which is given by Equation 3: Where: - ISS is the soft-start current source at the 20µA limit -VSREF is the buffered VREF reference voltage The end of soft-start is detected by ISS tapering off when capacitor CSOFT charges to VREF. The internal SSOK flag is set, the PGOOD pin goes high, and diode emulation mode (DEM) is enabled. Component Selection For CSOFT Capacitor Choosing the CSOFT capacitor to meet the requirements of a particular soft-start delay tSS is calculated using Equation 4, which is written as follows: Where: - tSS is the soft-start delay - ISS is the 20µA soft-start current source at the 20µA limit -VSREF is the buffered VREF reference voltage Fault Protection Overcurrent The overcurrent protection (OCP) setpoint is programmed with resistor ROCSET, which is connected across the OCSET and PHASE pins. Resistor RO is connected between the VO pin and the actual output voltage of the converter. During normal operation, the VO pin is a high impedance path, therefore there is no voltage drop across RO. The value of resistor RO should always match the value of resistor ROCSET. VFB VOUT ROFS RFB ROFS + ---------------------------------- ⋅ = (EQ. 1) ROFS VSREF R ⋅ FB VOUT VSREF – ----------------------------------------- = (EQ. 2) FIGURE 4. ISL78210 VOLTAGE PROGRAMMING SREF VSET + − VREF EA + − FB RFB VOUT VCOMP tSS VSREF CSOFT ⋅ ISS ------------------------------------------- = (EQ. 3) CSOFT tSS ISS ⋅ VSREF ----------------------- = (EQ. 4) FIGURE 5. OVERCURRENT PROGRAMMING CIRCUIT PHASE CO L VO ROCSET CSEN OCSET VO RO DCR IL 10µA + _ VDCR + _ VROCSET ISL78210 |
Similar Part No. - ISL78210ARUZ-T |
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Similar Description - ISL78210ARUZ-T |
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