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8-Bit Addressable Latch

1-of-8 Decoder

High–Performance Silicon–Gate CMOS

The MC54/74HC259A is identical in pinout to the LS259. The device

inputs are compatible with standard CMOS outputs; with pullup resistors,

they are compatible with LSTTL outputs.

The HC259A has four modes of operation as shown in the mode selection

table. In the addressable latch mode, the data on Data In is written into the

addressed latch. The addressed latch follows the data input with all

non–addressed latches remaining in their previous states. In the memory

mode, all latches remain in their previous state and are unaffected by the

Data or Address inputs. In the one–of–eight decoding or demultiplexing

mode, the addressed output follows the state of Data In with all other outputs

in the LOW state. In the Reset mode all outputs are LOW and unaffected by

the address and data inputs. When operating the HC259A as an

addressable latch, changing more than one bit of the address could impose

a transient wrong address. Therefore, this should only be done while in the

memory mode.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2 to 6 V

• Low Input Current: 1 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 202 FETs or 50.5 Equivalent Gates

LOGIC DIAGRAM

ADDRESS

INPUTS

A0

A1

A2

DATA IN

RESET

ENABLE

14

15

13

3

2

1

12

11

10

9

7

6

5

4

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

PIN 16 = VCC

PIN 8 = GND

NONINVERTING

OUTPUTS

LATCH SELECTION TABLE

Address Inputs

Latch

C

B

A

Addressed

L

L

L

Q0

L

L

H

Q1

L

H

L

Q2

L

H

H

Q3

H

L

L

Q4

H

L

H

Q5

H

H

L

Q6

H

H

H

Q7

MODE SELECTION TABLE

Enable

Reset

Mode

L

H

Addressable Latch

H

H

Memory

L

L

8–Line Demultiplexer

H

L

Reset

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

MC54/74HC259A

PIN ASSIGNMENT

13

14

15

16

9

10

11

12

5

4

3

2

1

8

7

6

Q7

DATA IN

ENABLE

RESET

VCC

Q4

Q5

Q6

Q0

A2

A1

A0

GND

Q3

Q2

Q1

D SUFFIX

SOIC PACKAGE

CASE 751B–05

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

ORDERING INFORMATION

MC54HCXXXAJ

MC74HCXXXAN

MC74HCXXXAD

MC74HCXXXADT

Ceramic

Plastic

SOIC

TSSOP

1

16

1

16

J SUFFIX

CERAMIC PACKAGE

CASE 620–10

1

16

1

16

DT SUFFIX

TSSOP PACKAGE

CASE 948F–01