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MAX6323 Datasheet(PDF) 10 Page - Maxim Integrated Products |
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MAX6323 Datasheet(HTML) 10 Page - Maxim Integrated Products |
10 / 13 page WDPO to MR Loopback An error detected by the watchdog often indicates that a problem has occurred in the µP code execution. This could be a stalled instruction or a loop from which the processor cannot free itself. If the µP will still respond to a nonmaskable input (NMI), the processor can be redirected to the proper code sequence by connecting the WDPO output to an NMI input. Internal RAM data should not be lost, but it may have been contaminated by the same error that caused the watchdog to time out. If the processor will not recognize NMI inputs, or if the internal data is considered potentially corrupted when a watchdog error occurs, the processor should be restarted with a reset function. To obtain proper reset timing characteristics, the WDPO output should be connected to the MR input, and the RESET output should drive the µP RESET input (Figure 10). The short 1ms WDPO pulse output will assert the manual reset input and force the RESET output to assert for the full reset timeout period (100ms min). All internal RAM data is lost during the reset period, but the processor is guaranteed to begin in the proper operating state. µP Supervisory Circuits with Windowed (Min/Max) Watchdog and Manual Reset 10 ______________________________________________________________________________________ START SET WDI LOW SUBROUTINE OR PROGRAM LOOP SET WDI HIGH RETURN END Figure 9. Watchdog Flow Diagram MAX6323 MAX6324 RESET WDPO µP RESET *MAX6324 ONLY MR WDI I/O GND VCC VCC VCC *RPULLUP 500pF Figure 10. WDPO to MR Loopback Circuit |
Similar Part No. - MAX6323_10 |
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Similar Description - MAX6323_10 |
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