300mA LDO Linear Regulators with Internal

Microprocessor Reset Circuit

8

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MAX6473/MAX6474/MAX6481/MAX6482 Pin Description

PIN

BUMP

MAX6473/MAX6474

MAX6481/MAX6482

SOT23

TDFN

UCSP

NAME

FUNCTION

1

1, 2

A1

IN

Regulator Input. Bypass IN to GND with a 0.1µF capacitor.

23

A2

GND

Ground. This pin also functions as a heatsink. Solder to large pads or

the circuit-board ground plane to maximize thermal dissipation.

34

A3

SHDN

45

C3

RESET

reset threshold or while MR is held low. RESET remains low for the

duration of the reset timeout period after the reset conditions are

terminated. RESET is available in open-drain and push-pull

configurations.

56

C2

MR

Active-Low Manual Reset Input. The reset output is asserted while MR

is pulled low and remains asserted for the duration of the reset timeout

period after MR transitions from low to high. Leave MR unconnected or

6

7, 8

C1

OUT

Regulator Output. Bypass OUT to GND with a minimum 3.3µF (min)

low-ESR capacitor.

—EP

—

—

Exposed Paddle. EP is internally connected to GND. Connect EP to the

ground plane to provide a low thermal-resistance path from the IC

junction to the PCB. Do not use as the electrical connection to GND.

MAX6475/MAX6476/MAX6483/MAX6484 Pin Description

PIN

BUMP

MAX6475/MAX6476

MAX6483/MAX6484

SOT23

TDFN

UCSP

NAME

FUNCTION

1

1, 2

A1

IN

Regulator Input. Bypass IN to GND with a 0.1µF capacitor.

23

A2

GND

Ground. This pin also functions as a heatsink. Solder to large pads or

the circuit-board ground plane to maximize thermal dissipation.

34

A3

SHDN

45

C3

RESET

Active-Low Reset Output. RESET remains low while FB is below the

reset threshold. RESET remains low for the duration of the reset timeout

period after the reset conditions are terminated. RESET is available in

open-drain and push-pull configurations.

56

C2

FB

Feedback Input for Linear Regulator Controller or Remote Sense

output voltage.

6

7, 8

C1

OUT

Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR

capacitor.

—EP

—

—

Exposed Paddle. EP is internally connected to GND. Connect EP to the

ground plane to provide a low thermal-resistance path from the IC

junction to the PCB. Do not use as the electrical connection to GND.