11

FN7438.1

October 30, 2008

more than 200µs. The output sink current will decrease and

To avoid unintentional adjustment, the EL9200, EL9201, and

EL9202 guarantees to reject CTL pulses shorter than 20µs.

Since the internal comparators come up in an unknown

state, the very first CTL pulse is ignored to avoid the

possibility of a false pulse.

See Figure 27 for the timing information.

TABLE 1. TRUTH TABLE

INPUT

OUTPUT

CTL

CE

SET

MEMORY

Mid to Hi

Hi

Decrement

Normal

X

Mid to Lo

Hi

Increment

Normal

X

XLo

No Change

Lower

X

> 4.9V

X

No Change

Increased

Program

X

X

Read

Increased

Read

NOTE: CE should be disabled (pulled low) before powering down the device to assure that the glitches and transients will not cause unwanted

EEPROM overwriting.

CTL HIGH

CTL LOW

78

79

7A

7B

7A

UNDEF

CTL

CE

COUNTER

OUTPUT

EL9200, EL9201, EL9202