2

FN9083.2

January 20, 2005

Block Diagram

Typical Application

Ordering Information

PART NUMBER

TEMP.

PACKAGE

PKG.

DWG. #

ISL6520BCB

0 to 70

8 Ld SOIC

M8.15

ISL6520BCBZ

(See Note)

0 to 70

8 Ld SOIC

(Pb-free)

M8.15

ISL6520BCR

0 to 70

16 Ld 4x4 QFN

L16.4x4

ISL6520BCRZ

(See Note)

0 to 70

16 Ld 4x4 QFN

(Pb-free)

L16.4x4

ISL6520BIR

-40 to 85

16 Ld 4x4 QFN

L16.4x4

ISL6520BIRZ

(See Note)

-40 to 85

16 Ld 4x4 QFN

(Pb-free)

L16.4x4

ISL6520EVAL1

Evaluation Board

Add “-T” suffix for tape and reel.

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding

compounds/die attach materials and 100% matte tin plate termination finish,

which are RoHS compliant and compatible with both SnPb and Pb-free

soldering operations. Intersil Pb-free products are MSL classified at Pb-free

peak reflow temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

PART NUMBER

TEMP.

PACKAGE

PKG.

DWG. #

+

-

+

-

OSCILLATOR

PWM

COMPARATOR

ERROR

AMP

V

CC

PWM

GND

FB

COMP/SD

0.8V

GATE

CONTROL

LOGIC

BOOT

UGATE

PHASE

20

µA

FIXED 300kHz

+

-

LGATE

VCC

SOFTSTART

POR AND

5V

FB

COMP/SD

UGATE

PHASE

BOOT

VCC

GND

LGATE

5

7

63

2

1

8

4

ISL6520B

SHUTDOWN

ISL6520B