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ISL6526EVAL2 Datasheet(PDF) 6 Page - Intersil Corporation

Part # ISL6526EVAL2
Description  Single Synchronous Buck Pulse-Width Modulation PWM Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6526EVAL2 Datasheet(HTML) 6 Page - Intersil Corporation

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Functional Pin Description
14 LEAD (SOIC)
TOP VIEW
16 LEAD 5X5 (QFN)
TOP VIEW
VCC
This pin provides the bias supply for the ISL6526. Connect a
well-decoupled 3.3V supply to this pin.
COMP and FB
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the internal
error amplifier and the COMP pin is the error amplifier
output. These pins are used to compensate the voltage-
control feedback loop of the converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the upper
MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-Channel MOSFET.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the lower
MOSFET has turned off.
OCSET
Connect a resistor (ROCSET) from this pin to the drain of the
upper MOSFET (VIN). ROCSET, an internal 20µA current
source (IOCSET), and the upper MOSFET on-resistance
(rDS(ON)) set the converter overcurrent (OC) trip point
according to the following equation:
An overcurrent trip cycles the soft-start function.
GATE DRIVERS
Upper Gate Source Current
IUGATE-SRC VBOOT - VPHASE = 5V, VUGATE = 4V
-
-1
-
A
Upper Gate Sink Current
IUGATE-SNK
-1-
A
Lower Gate Source Current
ILGATE-SRC VVCC = 3.3V, VLGATE = 4V
-
-1
-
A
Lower Gate Sink Current
ILGATE-SNK
-2-
A
PROTECTION/DISABLE
OCSET Current Source
IOCSET
Commercial
182022
µA
Industrial
16
20
22
µA
Disable Threshold
VDISABLE
--
0.8
V
Electrical Specifications
Recommended Operating Conditions, unless otherwise noted VCC = 3.3V±5% and TA = 25°C (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
12
14
13
4
3
2
1
LGATE
CPVOUT
UGATE
PHASE
VCC
BOOT
GND
CT1
11
7
6
5
9
8
10
CT2
OCSET
FB
CPGND
ENABLE
COMP
1
3
4
15
CPVOUT
CT1
CT2
OCSET
16
14
13
2
12
10
9
11
6
57
8
PHASE
VCC
CPGND
NC
IPEAK
IOCSETxROCSET
rDS ON
()
-------------------------------------------------
=
ISL6526


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