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ISL8011IRZ-T Datasheet(PDF) 5 Page - Intersil Corporation |
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ISL8011IRZ-T Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 10 page 5 FN9254.0 July 11, 2006 Pin Descriptions PVIN Input supply voltage. Connect a 10µF ceramic capacitor to power ground. VCC Supply voltage for internal analog and digital control circuits, delivered from PVIN. Bypass with 0.1µF ceramic capacitor to signal ground. EN Regulator enable pin. Force this pin above 1.4V enable the chip. Force this pin below 0.4V shutdown the chip and discharge output capacitor when driven to low. Do not leave this pin floating. POR 200ms timer output. At power-up or EN HI, this output is a 200ms delayed Power-Good signal for the output voltage. GND Ground. PHASE Switching node connection. Connect to one terminal of inductor. PGND Power ground. Connect all power grounds to this pin. SGND Analog ground. SGND and PGND should only have one point connection. FB Buck regulator output feedback. Connect to the output through a resistor divider for adjustable the output voltage. Exposed Pad The exposed pad must be connected to the PGND pin for proper electrical performance and optimal thermal performance. FIGURE 9. LOAD TRANSIENT (VIN = 3.6V; VO = 1.6V; IO =0A~1A) Typical Operating Performance (Continued) ISL8011 |
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