7

FN6554.0

October 8, 2007

Pin Descriptions

sum of the quiescent current and the average output current.

Knowing the operating frequency (Fsw) and the output

loading capacitance charge (Q) per output, the average

output current can be calculated from Equation 1:

control pin. A resistor is connected between this pin and

GND. The current flowing through the resistor determines

the magnitude of the discharge current. The discharge

current is nominally 55x this current. The PWM deadtime is

determined by the timing capacitor discharge duration.

this pin and GND.

CS - This is the input to the overcurrent protection comparator.

The overcurrent comparator threshold is set at 0.600V nominal.

The CS pin is shorted to GND at the end of each switching

cycle. Depending on the current sensing source impedance, a

series input resistor may be required due to the delay between

the internal clock and the external power switch.

Exceeding the overcurrent threshold will start a delayed

shutdown sequence. Once an overcurrent condition is

detected, the soft-start charge current source is disabled.

The soft-start capacitor begins discharging through a 15µA

current source, and if it discharges to less than 3.9V

(Sustained Overcurrent Threshold), a shutdown condition

occurs and the OUTA and OUTB outputs are forced low.

When the soft-start voltage reaches 0.27V (Reset

Threshold) a soft-start cycle begins.

If the overcurrent condition ceases, and then an additional

50µs period elapses before the shutdown threshold is

reached, no shutdown occurs. The SS charging current is

re-enabled and the soft-start voltage is allowed to recover.

GND - Reference and power ground for all functions on this

device. Due to high peak currents and high frequency

operation, a low impedance layout is necessary. Ground

planes and short traces are highly recommended.

OUTA and OUTB - Alternate half cycle output stages. Each

output is capable of 1A peak currents for driving power

MOSFETs or MOSFET drivers. Each output provides very

low impedance to overshoot and undershoot.

SS - Connect the soft-start timing capacitor between this pin

and GND to control the duration of soft-start. The value of the

capacitor determines the rate of increase of the duty cycle

during start-up, controls the overcurrent shutdown delay, and

the overcurrent and short circuit hiccup restart period.

Functional Description

Features

The ISL6744A PWM is an excellent choice for low cost

bridge topologies for applications requiring accurate

frequency and deadtime control. Among its many features

are 1A FET drivers, adjustable soft-start, overcurrent

protection and internal thermal protection, allowing a highly

flexible design with minimal external components.

Oscillator

The ISL6744A has an oscillator with a frequency range to

The switching period may be considered to be the sum of

the timing capacitor charge and discharge durations. The

switching cycle requires two oscillator cycles. The actual

times will be slightly longer than calculated due to internal

propagation delays of approximately 5ns/transition. This

delay adds directly to the switching duration, and also

causes overshoot of the timing capacitor peak and valley

voltage thresholds, effectively increasing the peak-to-peak

voltage on the timing capacitor. Additionally, if very low

charge and discharge currents are used, there will be an

The above formulae help with the estimation of the

frequency. Practically, effects like stray capacitances that

and charge current over temperature, etc. exist, and are best

evaluated in-circuit. Equation 2 follows from the basic

capacitor current equation,

. In this case, with

(Figure 4), results from Equation 2 would differ from the

calculated frequency. The typical performance curves may

be used as a tool along with the above equations as a more

accurate tool to estimate the operating frequency more

accurately.

The maximum duty cycle (D) and deadtime (DT) can be

calculated from Equations 5 and 6:

I

OUT

2QFsw

•

•

=

(EQ. 1)

T

C

1.25

4

×10

C

T

•

≈

s

(EQ. 2)

T

D

1

CTDisch

eCurrentGain

arg

-----------------------------------------------------------------------------

R

TD

•

C

T

•

≈

s

(EQ. 3)

T

OSC

T

C

T

D

+

1

F

OSC

----------------

==

s(EQ. 4)

iC

t

d

dV

×

=

DT

⁄

=

(EQ. 5)

DT

1

D

–

() T

OSC

⋅

=

s(EQ. 6)

ISL6744A