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ISL6722AARZ Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL6722AARZ Datasheet(HTML) 11 Page - Intersil Corporation |
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11 / 24 page  11 FN9237.1 July 11, 2007 The minimum amount of slope compensation required corresponds to 1/2 the inductor downslope. However, adding excessive slope compensation results in a control loop that behaves more as a voltage mode controller than as current mode controller. The minimum amount of capacitance to place at the SLOPE pin is: where tON is the On time and Vslope is the amount of voltage to be added as slope compensation to the current feedback signal. In general, the amount of slope compensation added is 2 to 3 times the minimum required. Example: Assume the inductor current signal presented at the ISENSE pin decreases 125mV during the Off period, and: Switching Frequency, fsw = 250kHz Duty Cycle, D = 60% tON = D/fsw = 0.6/250E3 = 2.4µs tOFF = (1 - D)/fsw = 1.6µs Determine the downslope: Downslope = 0.125V/1.6µs = 78mV/µs. Now determine the amount of voltage that must be added to the current sense signal by the end of the On time. Therefore, The value calculated, 110pF, represents the minimum slope compensation required. An appropriate slope compensation capacitance for this example would be 1/2 to 1/3 the calculated value, or between 68pF and 33pF. A more rigorous treatment of slope compensation can be obtained from the small signal current-mode model [1]. It can be shown that the naturally-sampled modulator gain, Fm, without slope compensation, is Equation 9: where Sn is the slope of the sawtooth signal and tsw is the switching frequency. When an external ramp is added, the modulator gain becomes Equation 10: where Se is slope of the external ramp. The criteria for determining the correct amount of external ramp can be determined by appropriately setting the damping factor of the double-pole located at half the oscillator frequency. The double-pole will be critically damped if the Q-factor is set to 1, under-damped for Q > 1, and over-damped for Q < 1. An under-damped condition may result in current loop instability. where D is the maximum duty cycle. Setting Q = 1 and solving for Se yields: Since Sn and Se are the on time slopes of the current ramp and the external ramp, respectively, they can be multiplied by tON to obtain the voltage change that occurs during tON. where Vn is the change in the current feedback signal during the on time and Ve is the voltage that must be added by the external ramp. For buck-derived topologies, Vn can be solved for in terms of output voltage, current transducer components, and output inductance yielding: where RCS is the current sense burden resistor, NCT is the current transformer turns ratio, LO is the output inductance, VO is the output voltage, and Ns and Np are the secondary and primary turns, respectively. Time Downslope Current Sense Signal FIGURE 5. TIME DOWNSLOPE CURRENT SENSE SIGNAL Cslope 4.24 6 – ×10 t ON Vslope -------------------- • = F (EQ. 6) Vslope 1 2 --- 0.078 2.4 • • 94mV == (EQ. 7) Cslope min () 4.24 6 – ×10 2.4 6 – ×10 0.094 ----------------------- • 110pF ≈ = (EQ. 8) Fm 1 Sn t sw ⋅ --------------------- = (EQ. 9) Fm 1 Sn Se + ()t sw ------------------------------------ 1 m c Sntsw ------------------------- == (EQ. 10) m c 1 Se Sn ------- + = (EQ. 11) Q 1 π m c 1D – () 0.5 – () ------------------------------------------------- = (EQ. 12) S e S n 1 π --- 0.5 + ⎝⎠ ⎛⎞ 1 1D – ------------- 1 – ⎝⎠ ⎛⎞ = (EQ. 13) V e V n 1 π --- 0.5 + ⎝⎠ ⎛⎞ 1 1D – ------------- 1 – ⎝⎠ ⎛⎞ = (EQ. 14) V e t SW V ⋅ O R CS ⋅ N CT LO ⋅ ---------------------------------------- N S N P -------- ⋅ 1 π --- D0.5 – + ⎝⎠ ⎛⎞ = V (EQ. 15) ISL6722A, ISL6723A |
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