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IRMCK371TR Datasheet(PDF) 10 Page - International Rectifier |
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IRMCK371TR Datasheet(HTML) 10 Page - International Rectifier |
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10 / 33 page  Rev 1.0 4.1 8051 Peripheral Interface Group UART Interface P1.2/TXD Output, Transmit data from IRMCK371, can be configured as P1.2 P1.1/RXD Input, Receive data to IRMCK371, can be configured as P1.1 Discrete I/O Interface P1.0/T2 Input/output port 1.0, can be configured as Timer 2 input P1.1/RXD Input/output port 1.1, can be configured as RXD input P1.2/TXD Input/output port 1.2, can be configured as TXD output P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock P1.4/CAP Input/output port 1.4, can be configured as Capture Timer input P2.0/NMI Input/output port 2.0, can be configured as non-maskable interrupt input P2.1 Input/output port 2.1 P3.0/INT2/CS1 Input/output port 3.0, can be configured as INT2 input or SPI chip select 1 P3.2/INT0 Input/output port 3.2, can be configured as INT0 input Analog Output Interface AOPWM Output, PWM output 0, 8-bit resolution, configurable carrier frequency Crystal Interface XTAL0 Input, connected to crystal XTAL1 Output, connected to crystal Reset Interface RESET Inout, system reset, needs to be pulled up to VDD1 but doesn’t require external RC time constant I 2C/SPI Interface SCL/SO-SI Input/output, I2C clock output or SPI data SDA/CS0 Input/output, I2C Data line or SPI chip select 0 P3.0/INT2/CS1 Input/output, INT2 or SPI chip select 1 P1.3/SYNC/SCK Input/output, SYNC output or SPI clock, needs to be pulled up to VDD1 in order to boot from I2C EEPROM 4.2 Motion Peripheral Interface Group PWM PWMUH Output, PWM phase U high side gate signal PWMUL Output, PWM phase U low side gate signal PWMVH Output, PWM phase V high side gate signal PWMVL Output, PWM phase V low side gate signal PWMWH Output, PWM phase W high side gate signal PWMWL Output, PWM phase W low side gate signal Fault GATEKILL Input, upon assertion, this negates all six PWM signals, programmable logic sense |
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Similar Description - IRMCK371TR |
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