Electronic Components Datasheet Search |
|
TPS61251DSGR Datasheet(PDF) 11 Page - Texas Instruments |
|
|
TPS61251DSGR Datasheet(HTML) 11 Page - Texas Instruments |
11 / 21 page ( ) OUT IN DS(on) OUT V V DCR r I = - + g TPS61251 www.ti.com SLVSAF7 – SEPTEMBER 2010 charging the capacitor with a constant current set by resistor RILIM. During constant current charging power dissipation in the TPS61251 is increased resulting in a thermal rise or heating of the device. If the output capacitor is very large charging time can be long and thermal rise high. To prevent overheating of the device during the charge phase the current will be limited to a lower value when device temperature is high. Please refer to THERMAL REGULATION. POWER-SAVE MODE The TPS61251 integrates a power save mode to improve efficiency at light load. In power save mode the converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output voltage with several pulses and goes into power save mode once the output voltage exceeds the set threshold voltage. During the power save operation when the output voltage is above the set threshold the converter turns off some of the inner circuits to save energy. The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM mode. SNOOZE MODE During this enhanced power save mode, the converter will still maintain the output voltage with a tolerance of ±2%. The operating current in snooze mode, is however, drastically reduced to a typical value of 2 mA. This will be achieved by turning off as much as possible of the inner regulation circuits. Load current in snooze mode is limited to 2 mA. If the load current increases above 2 mA, the controller recognizes a further drop of the output voltage and the device turns on again in order to charge the output capacitor to the programmed output voltage again. 100% DUTY-CYCLE MODE If VIN > VOUT the TPS61251 offers the lowest possible input-to-output voltage difference while still maintaining current limit operation with the use of the 100% duty-cycle mode. In this mode, the PMOS switch is constantly turned on. During this operation the output voltage follows the input voltage and will not fall below the programmed value if the input voltage decreases below VOUT. The output voltage drop during 100% mode depends on the load current and input voltage, and the resulting output voltage is calculated as: (3) with: DCR is the DC resistance of the inductor rDS(on) is the typical on-resistance of the PMOS switch ENABLE The device is enabled by setting EN pin to a voltage above 1 V. At first, the internal reference is activated and the internal analog circuits are settled. Afterwards, the softstart is activated and the output voltage ramps up. The output voltage reaches its nominal value as fast as the current limit settings and the load condition allows it. The EN input can be used to control power sequencing in a system with several DC/DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TPS61251 |
Similar Part No. - TPS61251DSGR |
|
Similar Description - TPS61251DSGR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |