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SN65LVPE504 Datasheet(PDF) 10 Page - Texas Instruments |
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SN65LVPE504 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 16 page  Y = 8", 5milSL on FR4 CH X = 40", 4milSL on FR4 AWG* JitterMeasurement A1 5 GbpsSignalGen. K28.5 pattern, 800mVpp 2" 2" Y = 23", 5milSL on FR4 CH X = 25", 4milSL on FR4 AWG* JitterMeasurement A2 B 5 GbpsSignalGen. K28.5 pattern, 800mVpp 2" 2" 1-bit 1 toNbits 1-bit 1 toNbits DiffVppTX DiffVppTX_DE Vcm tDE tDE -3.4dB -6.2dB -10.3dB DEx = 1; OSx = NC DEx = 0; OSx = NC DEx/OSx = NC SN65LVPE504 SLLSE46 – SEPTEMBER 2010 www.ti.com Figure 8. Jitter Measurement Setup Figure 9. Output De-Emphasis Levels 10 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): SN65LVPE504 |
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