2

8246AS–AVR–11/09

ATtiny2313A/4313

1. Pin Configurations

Figure 1-1.

Pinout ATtiny2313A/4313

1.1

Pin Descriptions

1.1.1

VCC

Digital supply voltage.

1.1.2

GND

Ground.

1.1.3

Port A (PA2..PA0)

Port A is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port A output buffers have symmetrical drive characteristics with both high sink and source

capability, except PA2 which has the RESET capability. To use pin PA2 as I/O pin, instead of

RESET pin, program (“0”) RSTDISBL fuse. As inputs, Port A pins that are externally pulled low

(PCINT10/RESET/dW) PA2

(PCINT11/RXD) PD0

(PCINT12/TXD) PD1

(PCINT9/XTAL2) PA1

(PCINT8/CLKI/XTAL1) PA0

(PCINT13/CKOUT/XCK/INT0) PD2

(PCINT14/INT1) PD3

(PCINT15/T0) PD4

(PCINT16/OC0B/T1) PD5

GND

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

VCC

PB7 (USCK/SCL/SCK/PCINT7)

PB6 (MISO/DO/PCINT6)

PB5 (MOSI/DI/SDA/PCINT5)

PB4 (OC1B/PCINT4)

PB3 (OC1A/PCINT3)

PB2 (OC0A/PCINT2)

PB1 (AIN1/PCINT1)

PB0 (AIN0/PCINT0)

PD6 (ICPI/PCINT17)

PDIP/SOIC

1

2

3

4

5

MLF/VQFN

15

14

13

12

11

(PCINT12/TXD) PD1

(PCINT9/XTAL2) PA1

(PCINT8/CLKI/XTAL1) PA0

(PCINT13/CKOUT/XCK/INT0) PD2

(PCINT14/INT1) PD3

PB5 (MOSI/DI/SDA/PCINT5)

PB4 (OC1B/PCINT4)

PB3 (OC1A/PCINT3)

PB2 (OC0A/PCINT2)

PB1 (AIN1/PCINT1)

NOTE: Bottom pad should be soldered to ground.