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REJ03B0267-0101 Rev.1.01 Page 12 of 156 Jul 23, 2010 M16C/5M Group, M16C/57 Group 1. Overview 1.4 Block Diagrams Figure 1.3 to Figure 1.5 show a block diagram of M16C/5M Group and M16C/57 Group. Figure 1.3 100-Pin Block Diagram Port P0 Port P1 Port P2 Port P3 8 8 8 8 Peripherals Timer (16-bit) Output (timer A): 5 Input (timer B): 6 Three-phase motor control circuit Timer S (Input capture/output compare) Time measurement: 8 channels Waveform generating: 8 channels A/D converter (10-bit x 26 channel) UART/clock synchronous serial interface (5 channels) Multi-master I2C-bus (1 channel) Clock generator XIN-XOUT XCIN-XCOUT 40 MHz on-chip oscillator 125 kHz on-chip oscillator PLL frequency synthesizer CAN module (32-slot message buffer, 2 or 1 channel) (M16C/5M Group only) (1) Watchdog timer (15 bits, with the dedicated 125 kHz on-chip oscillator for the watchdog timer) CRC calculator (CCITT, CRC-16) DMAC (4 channels) M16C/60 Series CPU core R3 FB SB INTB USP ISP PC FLG R0H R0L R1H R1L R2 R3 A0 A1 FB Memory ROM (1) RAM (1) Multiplier Note: 1. The ROM size, RAM size, number of channels for the CAN module, and whether the E 2dataFlash is provided or not depend on the MCU type. I/O ports Task monitoring timer (1 channel) Real-time clock LIN module (1 channel) E2dataFlash (1) D/A converter (8-bit x 1 circuit) Serial bus interface (1 channel) Port P4 Port P5 8 8 Power-on reset Voltage detector On-chip debugger |
