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REJ03B0299-0100 Rev.1.00 Page 54 of 127 Jul 16, 2010 R32C/118A Group 4. Special Function Registers (SFRs) Note: 1. The bit 0 is set to 1 when the most recent reset is caused by the watchdog timer. Otherwise, it is set to 0. Table 4.25 SFR List (25) Address Register Symbol Reset Value 044000h to 04403Fh 044040h 044041h 044042h 044043h 044044h 044045h 044046h 044047h 044048h 044049h 04404Ah 04404Bh 04404Ch Protect Register 4 PRCR4 0000 0000b 04404Dh Watchdog Timer Clock Control Register WDK 0000 000?b (1) 04404Eh Watchdog Timer Start Register WDTS XXXX XXXXb 04404Fh Watchdog Timer Control Register WDC 000X XXXXb 044050h 044051h 044052h 044053h 044054h 044055h 044056h 044057h 044058h 044059h 04405Ah 04405Bh 04405Ch 04405Dh 04405Eh 04405Fh Protect Register 2 PRCR2 0XXX XXXXb X: Undefined Blanks are reserved. No access is allowed. |
