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R8C/M11A Group, R8C/M12A Group 4. Electrical Characteristics Under development Preliminary document Specifications in this document are tentative and subject to change. R01DS0010EJ0010 Rev.0.10 Page 30 of 45 Aug 25, 2010 Notes: 1. The measurement condition is Topr = -20 °C to 85 °C (N version)/-40 °C to 85 °C (D version), unless otherwise specified. 2. To use the power-on reset function, enable the voltage monitor 0 reset by setting the LVDAS bit in the OFS register to 0. Figure 4.3 Power-On Reset Circuit Electrical Characteristics Table 4.9 Power-On Reset Circuit (2) Symbol Parameter Condition Standard Unit Min. Typ. Max. trth External power Vcc rise gradient 0 — 50,000 mV/msec Notes: 1. Vdet0 indicates the voltage detection level of the voltage detection 0 circuit. For details, see 7. Voltage Detection Circuit in the User’s Manual: Hardware. 2. tw(por) is required for a power-on reset to be enabled with the external power Vcc held below the valid voltage (0.5 V) to enable a power-on reset. When Vcc decreases with voltage monitor 0 reset disabled and then turns on, maintain tw(por) for 1 ms or more. Vdet0 (1) Internal reset signal (low active) 0.5 V tw(por) (2) trth Voltage detection 0 circuit response time External power Vcc trth × 256 1 fLOCO × 256 1 fLOCO |
