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PT6964 Datasheet(PDF) 6 Page - Princeton Technology Corp |
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PT6964 Datasheet(HTML) 6 Page - Princeton Technology Corp |
6 / 15 page PT6964 V1.4 6 October 2009 PT6964 KEY MATRIX & KEY INPUT DATA STORAGE RAM PT6964 Key Matrix consists of 10 x 2 array as shown below: Each data entered by each key is stored as follows and read by a READ Command, starting from the last significant bit. When the most significant bit of the data (b7) has been read, the least significant bit of the next data (b0) is read. K1……………………...K2 K1………………………K2 Reading Sequence SG1/KS1 SG2/KS2 x SG3/KS3 SG4/KS4 x SG5/KS5 SG6/KS6 x SG7/KS7 SG8/KS8 x SG9/KS9 SG10/KS10 x b0………………………b1 b3………………………..b4 b6………………………b7 Note: b6 and b7 do not care. COMMANDS 3: ADDRESS SETTING COMMANDS Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of 00H to 0DH. If the address is set to 0EH or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at 00H. Please refer to the diagram below. MSB LSB 1 1 - - b3 b2 b1 b0 Not relevant Address: 00H to 0DH DISPLAY MODE AND RAM ADDRESS Data transmitted from an external device to PT6964 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM addresses of PT6964 are given below in 8 bits unit. SG1 SG4 SG5 SG8 SG9 SG10 X SG12 SG13 SG14 00HL 00HU 01HL - 01HU DIG1 02HL 02HU 03HL - 03HU DIG2 04HL 04HU 05HL - 05HU DIG3 06HL 06HU 07HL - 07HU DIG4 08HL 08HU 09HL - 09HU DIG5 0AHL 0AHU 0BHL - 0BHU DIG6 0CHL 0CHU 0DHL - 0DHU DIG7 b0 b3 b4 b7 xxHL xxHU Lower 4 bits Higher 4 bits Note: X = Not relevant |
Similar Part No. - PT6964_10 |
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Similar Description - PT6964_10 |
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