SC4217

8

Introduction

The SC427 is intended for applications where high cur-

rent capability and very low dropout voltage are required.

It provides a very simple, low cost solution that uses

very little PCB real estate. Additional features include an

enable pin to allow for a very low power consumption

standby mode, and a fully adjustable output.

Component Selection

Input Capacitor

A minimum of 4.7µF ceramic or tantalum capacitor is

recommended to be placed directly next to the Vin pin.

This allows for the device being some distance from any

bulk capacitance on the rail. Additionally, bulk capaci-

tance of about ≥ 0µF may be added closely to the input

supply pin of the SC427 to ensure that Vin does not sag,

improving load transient response.

Output Capacitor

A minimum bulk capacitance of ≥ 0µF, along with a

0.µF ceramic decoupling capacitor is recommended.

Increasing the bulk capacitance will improve the over-

all transient response. The use of multiple lower value

ceramic capacitors in parallel to achieve the desired bulk

capacitance will not cause stability issues. Although

designed for use with ceramic output capacitors, the

SC427 is extremely tolerant of output capacitor ESR

values and thus will also work comfortably with tantalum

output capacitors.

Noise immunity

In very electrically noisy environments, it is recommended

that 0.µF ceramic capacitors be placed from IN to GND

and OUT to GND as close to the device pins as possible.

External Voltage Selection Resistors

The use of % resistors, and designing for a current flow

≥0µA is recommended to ensure a well regulated output

(thus R2 ≤ 50kΩ).

Enable

Pulling this pin below 0.4V turns the regulator off, reduc-

ing the quiescent current to a fraction of its operating

value.

Thermal Considerations

The power dissipation in the SC427 is approximately

equal to the product of the output current and the

input to output voltage differential:

O

D

I

VOUT)

(VIN

P

The absolute worst-case dissipation is given by:

Q(MAX)

IN(MAX)

(MIN)

(MAX)

I

V

I

)

VOUT

(VIN

P

O(MAX)

D

For a typical scenario, V

I

V

Thus P

Using this figure, and assuming T

calculate the maximum thermal impedance allowable

to maintain T

C/W

73.4

1.09

70)

(150

P

)

T

(T

R

D(MAX)

A(MAX)

J(MAX)

A)(MAX)

TH(J

This should be achievable for the TO263-5 package us-

ing pcb copper area to aid in conducting the heat away,

such as one square inch of copper connected to the

exposed die pad of the device. Internal ground/power

planes and air flow will also assist in removing heat. For

higher ambient temperatures it may be necessary to

use additional copper area.

Applications Information