–

+

DUT

R

D

1.5kW

V

HBM

100pF

C

S

100

150

200

50

0

1.5

1.0

0.5

0.0

V

= 2 kV

HBM

DUT = 10-V, 1-W Zener Diode

|

Time (ns)

TRS202E

SLLS847C – JULY 2007 – REVISED MAY 2010

www.ti.com

ESD Protection

TI TRS202E devices have standard ESD protection structures incorporated on the pins to protect against

electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver

outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures

were designed to successfully protect these bus pins against ESD discharge of ±15-kV when powered down.

ESD Test Conditions

Stringent ESD testing is performed by TI, based on various conditions and procedures. Please contact TI for a

reliability report that documents test setup, methodology, and results.

Human-Body Model (HBM)

The HBM of ESD testing is shown in Figure 5. Figure 6 shows the current waveform that is generated during a

discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of

concern, and subsequently discharged into the device under test (DUT) through a 1.5-k

Ω resistor.

Figure 5. HBM ESD Test Circuit

Figure 6. Typical HBM Current Waveform

8

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