DESCRIPTION (CONTINUED)

1

2

3

4

5

6

7

8

SPLIT

CANL

CANH

STB

RXD

V

CC

GND

TXD

D PACKAGE

(TOP VIEW)

SN65HVD1040A-Q1

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Designed for operation in especially harsh environments, the SN65HVD1040A features cross-wire, over-voltage,

and loss of ground protection from –27 V to 40 V, over-temperature protection, a –12-V to 12-V common-mode

range, and withstands voltage transients according to ISO 7637.

STB (pin 8) provides two different modes of operation: high-speed mode or low-current standby mode. The

high-speed mode of operation is selected by connecting STB (pin 8) to ground.

If a high logic level is applied to the STB pin of the SN65HVD1040A, the device enters a low-current standby

mode, while the receiver remains active in a low-power bus-monitor standby mode.

In the low-current standby mode, a dominant bit greater than 5

µs on the bus is passed by the bus-monitor circuit

to the receiver output. The local protocol controller may then reactivate the device when it needs to transmit to

the bus.

A dominant time-out circuit in the SN65HVD1040A prevents the driver from blocking network communication with

a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge

is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the

next rising edge on TXD.

application information).

MARKED

PART NUMBER

ORDERING NUMBER

AS

SN65HVD1040A-Q1

SOIC-8

1040AQ

SN65HVD1040AQDRQ1 (reel)

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

2

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