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S3C7524 Datasheet(PDF) 9 Page - Samsung semiconductor |
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S3C7524 Datasheet(HTML) 9 Page - Samsung semiconductor |
9 / 34 page S3C7524/C7528/P7528/C7534/C7538/P7538 PRODUCT OVERVIEW 1-9 Table 1-2. S3C7534/C7538 Pin Descriptions Pin Name Pin Type Description Pin Number Share Pin Circuit Type P1.0 I 1-bit input port. 1-bit and 4-bit read and test is possible. Each bit pull-up resistors are assignable. 23 (25) INT0 A-4 P2.0 P2.1 P2.2 P2.3 I/O 4-bit I/O port. 1-bit and 4-bit read/write and test is possible. Each individual pin can be assignable as input or output. 4-bit pull-up resisters are software assignable to input pins and are automatically disabled for output pins. 24 (26) 25 (27) 26 (28) 27 (29) TCLO0 TCLO1 CLO BUZ D-2 P3.0 P3.1 Ports 2 and 3 can be paired to enable 8-bit data transfer. 28 (30) 29 (31) TCL0 TCL1 D-4 P4.0 P4.1 P4.2 P4.3 P5.0–P5.3 I/O 4-bit I/O ports. 1-bit and 4-bit read/write and test is possible. Each individual pin can be assignable as input or output. 4-bit pull-up resisters are software assignable to input pins and are automatically disabled for output pins. The N-channel open-drain or push-pull output can be selected by software (1-bit unit). Ports 4 and 5 can be paired to enable 8-bit data transfer. 5 (5) 6 (6) 8 (8) 9 (10) 10–13 (11–14) BTCO E-2 P6.0–P6.3 P7.0–P7.3 I/O 4-bit I/O ports. 1-bit and 4-bit read/write and test is possible. Each individual pin can be assignable as input or output. 4-bit pull-up resisters are software assignable to input pins and are automatically disabled for output pins. Ports 6 and 7 can be paired to enable 8-bit data transfer. 14–17 (15–18) 18–21 (19–22) KS0–KS3 KS4–KS7 D-4 |
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