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KS58015 Datasheet(PDF) 2 Page - Samsung semiconductor |
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KS58015 Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 4 page KS58015 DTMF DIALER FOR BINARY DATA-IN PIN CONFIGURATION Fig. 2 PIN DESCRIPTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 KS58015 VDD TEN ST GS VSS OSC IN OSC OUT MUTE TONE OUT D3 D2 D1 D0 NC Pin No Symbol Descriptions 1 VDD Positive supply input 2 TEN Tone enable input. An internal pull-up resistor is in a chip. When this pin connects to logic ‘low’, the oscillator is inhibited and the tone generators and output transistor are turned off. A low to high transition on this pin latches in data from D0 ~ D3, and tone generation continues until this pin is connected ‘low’again. 3 ST Single tone enable. An internal pull-up resistor is in a chip. When this pin connects to logic ‘low’, the device is in a single tone mode. For normal operation, connects this pin to VDD or open-circuit. 4 GS Group selection input. This pin is used to select the high group or low group fre- quency, when the device is in single tone mode. An internal pull-up resistor is in a chip. When this pin connects to VDD or open, the high group will be generated, and when connects to VSS, the low group will be generated. 5 VSS Negative supply input 6 OSC IN Oscillator input 7 OSC OUT Oscillator output 8 MUTE N-channel open drain output. This pin is a logic high state, when the tone enable pin is a high state. This pin goes a logic low state, when the tone enable pin is a low state. 9, 10, 11, 12 D0, D1, D2, D3 DATA-INPUTS. These are the inputs for binary-coded data, which is latched in on the rising edge of the tone enable signal. 13 N.C No connection. 14 Tone out This output is the open emitter of a NPN transistor. When an external load resistor is connected from this pin to VSS, the tone generates on the tone enable pin = ‘High’. |
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