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K6T4008U1C-MF85 Datasheet(PDF) 2 Page - Samsung semiconductor |
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K6T4008U1C-MF85 Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 10 page K6T4008V1C, K6T4008U1C Family CMOS SRAM Revision 1.0 January 1999 2 512K ×8 bit Low Power and Low Voltage CMOS Static RAM GENERAL DESCRIPTION The K6T4008V1C and K6T4008U1C families are fabricated by SAMSUNG ′s advanced CMOS process technology. The fami- lies support various operating temperature range and have var- ious package type for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current. FEATURES • Process Technology: TFT • Organization: 512K×8 • Power Supply Voltage K6T4008V1C Family: 3.0~3.6V K6T4008U1C Family: 2.7~3.3V • Low Data Retention Voltage: 2V(Min) • Three state output and TTL Compatible • Package Type: 32-SOP-525, 32-TSOP2-400F/R 32-TSOP1-0820F, 32-TSOP1-0813.4F PIN DESCRIPTION Name Function Name Function A0~A18 Address Inputs Vcc Power WE Write Enable Input Vss Ground CS Chip Select Input I/O1~I/O8 Data Inputs/Outputs OE Output Enable Input PRODUCT FAMILY 1. The paramerter is measured with 30pF test load. Product Family Operating Temperature Vcc Range Speed Power Dissipation PKG Type Standby (ISB1, Max) Operating (ICC2, Max) K6T4008V1C-B Commercial(0~70 °C) 3.0~3.6V 701)/85ns 15 µA 30mA 32-SOP 32-TSOP2-F/R 32-TSOP1-F 32-sTSOP1-F K6T4008U1C-B 2.7~3.3V 701)/85/100ns K6T4008V1C-F Industrial(-40~85 °C) 3.0~3.6V 701)/85ns 20 µA K6T4008U1C-F 2.7~3.3V 701)/85/100ns FUNCTIONAL BLOCK DIAGRAM 32-SOP (Forward) 32-TSOP2 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS VCC A15 WE A13 A8 A9 A11 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32-TSOP2 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS VCC A15 WE A13 A8 A9 A11 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Reverse) A18 A17 A17 A18 SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. A15 Precharge circuit. Memory array 1024 rows 512 ×8 columns I/O Circuit Column select Clk gen. Row select A2 A3 A8 A9 A10 A13 A11 A0 A1 A4 A5 A6 A7 A14 CS WE I/O1 Data cont Data cont OE I/O8 A12 A16 A18 A11 A9 A8 A13 WE A17 A15 VCC A18 A16 A14 A12 A7 A6 A5 A4 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3 32-TSOP1 (Forward) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A17 Control logic 32-STSOP1 |
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