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K9F1208U0M- Datasheet(PDF) 6 Page - Samsung semiconductor |
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K9F1208U0M- Datasheet(HTML) 6 Page - Samsung semiconductor |
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6 / 41 page  K9F1208U0M-YCB0, K9F1208U0M-YIB0 FLASH MEMORY 6 64M x 8 Bit NAND Flash Memory The K9F1208U0M is a 64M(67,108,864)x8bit NAND Flash Memory with a spare 2,048K(2,097,152)x8bit. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 200 µs on the 528-byte page and an erase operation can be performed in typical 2ms on a 16K-byte block. Data in the page can be read out at 50ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command inputs. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take advantage of the K9F1208U0M’s extended reliability of 100K program/erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The K9F1208U0M-YCB0/YIB0 is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requir- ing non-volatility. General Description Features • Voltage Supply : 2.7V~3.6V • Organization - Memory Cell Array : (64M + 2,048K)bit x 8bit - Data Register : (512 + 16)bit x8bit multipled by four planes • Automatic Program and Erase - Page Program : (512 + 16)Byte - Block Erase : (16K + 512)Byte • 528-Byte Page Read Operation - Random Access : 12 µs(Max.) - Serial Page Access : 50ns(Min.) • Fast Write Cycle Time - Program time : 200 µs(Typ.) - Block Erase Time : 2ms(Typ.) • Command/Address/Data Multiplexed I/O Port • Hardware Data Protection - Program/Erase Lockout During Power Transitions • Reliable CMOS Floating-Gate Technology - Endurance : 100K Program/Erase Cycles - Data Retention : 10 Years • Command Register Operation • Intelligent Copy-Back Operation • Package : - K9F1208U0M-YCB0, K9F1208U0M-YIB0 : 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) • Simultaneous Four Page/Block Program/Erase Pin Configuration NOTE : Connect all VCC and VSS pins of each device to common power supply outputs. Do not leave VCC or VSS disconnected. 48-pin TSOP1 Standard Type 12mm x 20mm 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 N.C N.C N.C N.C N.C N.C R/B RE CE N.C N.C Vcc Vss N.C N.C CLE ALE WE WP N.C N.C N.C N.C N.C N.C N.C N.C N.C I/O7 I/O6 I/O5 I/O4 N.C N.C N.C Vcc Vss N.C N.C N.C I/O3 I/O2 I/O1 I/O0 N.C N.C N.C N.C Pin Name Pin Function I/O0 ~ I/O7 Data Input/Outputs CLE Command Latch Enable ALE Address Latch Enable CE Chip Enable RE Read Enable WE Write Enable WP Write Protect R/B Ready/Busy output VCC Power(+2.7V~3.6V) VSS Ground N.C No Connection Pin Description |
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