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MSP430F5419AIPZR Datasheet(PDF) 9 Page - Texas Instruments |
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MSP430F5419AIPZR Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 99 page  MSP430F543x, MSP430F541x www.ti.com SLAS612C – AUGUST 2009 – REVISED MARCH 2010 TERMINAL FUNCTIONS (continued) TERMINAL NO. I/O(1) DESCRIPTION NAME PZ PN General-purpose digital I/O Clock signal input – USCI_B2 SPI slave mode P9.3/UCB2CLK/UCA2STE 71 N/A I/O Clock signal output – USCI_B2 SPI master mode Slave transmit enable – USCI_A2 SPI mode General-purpose digital I/O P9.4/UCA2TXD/UCA2SIMO 72 N/A I/O Transmit data – USCI_A2 UART mode Slave in, master out – USCI_A2 SPI mode General-purpose digital I/O P9.5/UCA2RXD/UCA2SOMI 73 N/A I/O Receive data – USCI_A2 UART mode Slave out, master in – USCI_A2 SPI mode P9.6 74 N/A I/O General-purpose digital I/O P9.7 75 N/A I/O General-purpose digital I/O General-purpose digital I/O Slave transmit enable – USCI_B3 SPI mode P10.0/UCB3STE/UCA3CLK 76 N/A I/O Clock signal input – USCI_A3 SPI slave mode Clock signal output – USCI_A3 SPI master mode General-purpose digital I/O P10.1/UCB3SIMO/UCB3SDA 77 N/A I/O Slave in, master out – USCI_B3 SPI mode I2C data – USCI_B3 I2C mode General-purpose digital I/O P10.2/UCB3SOMI/UCB3SCL 78 N/A I/O Slave out, master in – USCI_B3 SPI mode I2C clock – USCI_B3 I2C mode General-purpose digital I/O Clock signal input – USCI_B3 SPI slave mode P10.3/UCB3CLK/UCA3STE 79 N/A I/O Clock signal output – USCI_B3 SPI master mode Slave transmit enable – USCI_A3 SPI mode General-purpose digital I/O P10.4/UCA3TXD/UCA3SIMO 80 N/A I/O Transmit data – USCI_A3 UART mode Slave in, master out – USCI_A3 SPI mode General-purpose digital I/O P10.5/UCA3RXD/UCA3SOMI 81 N/A I/O Receive data – USCI_A3 UART mode Slave out, master in – USCI_A3 SPI mode P10.6 82 N/A I/O General-purpose digital I/O P10.7 83 N/A I/O General-purpose digital I/O General-purpose digital I/O P11.0/ACLK 84 N/A I/O ACLK output (divided by 1, 2, 4, 8, 16, or 32) General-purpose digital I/O P11.1/MCLK 85 N/A I/O MCLK output General-purpose digital I/O P11.2/SMCLK 86 N/A I/O SMCLK output DVCC4 87 67 Digital power supply DVSS4 88 68 Digital ground supply General-purpose digital I/O P5.2/XT2IN 89 69 I/O Input terminal for crystal oscillator XT2 General-purpose digital I/O P5.3/XT2OUT 90 70 I/O Output terminal of crystal oscillator XT2 Test mode pin – select digital I/O on JTAG pins TEST/SBWTCK(3) 91 71 I Spy-bi-wire input clock General-purpose digital I/O PJ.0/TDO(4) 92 72 I/O Test data output port General-purpose digital I/O PJ.1/TDI/TCLK(4) 93 73 I/O Test data input or test clock input (3) See Bootstrap Loader (BSL) and JTAG Operation for use with BSL and JTAG functions (4) See JTAG Operation for use with JTAG function. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 9 |
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